M29F010B70N6 Micron Technology Inc, M29F010B70N6 Datasheet - Page 11

• Manufacturer Part Number: M29F010B70N6
• Manufacturer: Micron Technology Inc

Specifications of M29F010B70N6

• Lead Free Status / Rohs Status: Not Compliant

M29F010B
2.7
3
3.1
3.2
3.3
Vss Ground
The V
Bus operations
There are five standard bus operations that control the device. These are Bus Read, Bus
Write, Output Disable, Standby and Automatic Standby. See
summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by
the memory and do not affect bus operations.
Bus Read
Bus Read operations read from the memory cells, or specific registers in the Command
Interface. A valid Bus Read operation involves setting the desired address on the Address
Inputs, applying a Low signal, V
Enable High, V
AC waveforms
becomes valid.
Bus Write
Bus Write operations write to the Command Interface. A valid Bus Write operation begins by
setting the desired address on the Address Inputs. The Address Inputs are latched by the
Command Interface on the falling edge of Chip Enable or Write Enable, whichever occurs
last. The Data Inputs/Outputs are latched by the Command Interface on the rising edge of
Chip Enable or Write Enable, whichever occurs first. Output Enable must remain High, V
during the whole Bus Write operation. See
controlled,
characteristics, Write Enable controlled
controlled, for details of the timing requirements.
Output Disable
The Data Inputs/Outputs are in the high impedance state when Output Enable is High, V
SS
Ground is the reference for all voltage measurements.
Figure 10: Write AC waveforms, Chip Enable
IH
and
. The Data Inputs/Outputs will output the value, see
Table 11: Read AC
IL
, to Chip Enable and Output Enable and keeping Write
characteristics, for details of when the output
and
Figure 9: Write AC waveforms, Write Enable
Table 13: Write AC characteristics, Chip Enable
controlled,
Table 3: Bus
Table 12: Write AC
Figure 8: Read Mode
operations, for a
Bus operations
11/35
IH
IH
,
.