MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 80

• Manufacturer Part Number: MC68HC705X32CFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705X32CFU

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 528Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

5
5.3.9
This register allows the setup of different output driver configurations under software control. The
user may select active pull-up, pull-down, float or push-pull output.
Note:
OCM1 and OCM0 — Output control mode bits
The values of these two bits determine the output mode, as shown in
Note:
Biphase mode
If the CAN modules are isolated from the bus lines by a transformer then the bit stream has to be
coded so that there is no resulting dc component. There is a flip-flop within the MCAN that keeps
the last dominant configuration; its direct output goes to TX0 and its complement to TX1. The
flip-flop is toggled for each dominant bit; dominant bits are thus sent alternately on TX0 and TX1;
i.e. the first dominant bit is sent on TX0, the second on TX1, the third on TX0 and so on. During
recessive bits, all output drivers are deactivated (i.e. high impedance).
MCAN output control (COCNTRL)
This register can only be accessed when the reset request bit in the CCNTRL register
is set.
The transmit clock (t
the SYNC_SEG.
For all the following modes of operation, a dominant bit is internally coded as a zero, a
recessive as a one. The other output control bits are used to determine the actual
voltage levels transmitted to the MCAN bus for dominant and recessive bits.
MCAN output control register (COCNTRL)
OCM1
0
0
1
1
Freescale Semiconductor, Inc.
For More Information On This Product,
OCM0
Address
MOTOROLA CAN MODULE (MCAN)
$0028 OCTP1 OCTN1
xclk
0
1
0
1
Table 5-4 Output control modes
) is used to indicate the end of the bit time and will be high during
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Biphase mode
Not used
Normal mode 1
Bit stream transmitted on both TX0 and TX1
Normal mode 2
TX0 - bit sequence
TX1 - bus clock (t
bit 7
bit 6
OCPOL1
xclk
bit 5
)
OCTP0 OCTN0
bit 4
Function
bit 3
OCPOL0
bit 2
Table
OCM1 OCM0 Undefined
5-4.
bit 1
MC68HC05X16
bit 0
on reset
State
Rev. 1