AM29LV800DT-70EC AMD (ADVANCED MICRO DEVICES), AM29LV800DT-70EC Datasheet - Page 30

• Manufacturer Part Number: AM29LV800DT-70EC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29LV800DT-70EC

• Lead Free Status / Rohs Status: Not Compliant

9.6
9.7
30
DQ5: Exceeded Timing Limits
DQ3: Sector Erase Timer
DQ5 indicates whether the program or erase time exceeded a specified internal pulse count limit. Under
these conditions DQ5 produces a 1. This is a failure condition that indicates the program or erase cycle was
not successfully completed.
The DQ5 failure condition may appear if the system tries to program a 1 to a location that is previously
programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device
halts the operation, and when the operation exceeds the timing limits, DQ5 produces a 1.
Under both these conditions, the system must issue the reset command to return the device to reading array
data.
After writing a sector erase command sequence, the system may read DQ3 to determine whether or not an
erase operation started. (The sector erase timer does not apply to the chip erase command.) If additional
sectors are selected for erasure, the entire time-out also applies after each additional sector erase command.
When the time-out is complete, DQ3 switches from 0 to 1. The system may ignore DQ3 if the system can
guarantee that the time between additional
sector erase commands is always less than 50 µs. See also
Notes
1. Read toggle bit twice to determine whether or not it is toggling. See text.
2. Recheck toggle bit because it may stop toggling as DQ5 changes to 1. See text.
(Note 1)
No
Figure 9.2 Toggle Bit Algorithm
S29AL008D
Reset Command
Complete, Write
Read DQ7–DQ0
Read DQ7–DQ0
Read DQ7–DQ0
Program/Erase
Operation Not
D a t a
Toggle Bit
DQ5 = 1?
Toggle Bit
= Toggle?
= Toggle?
START
Twice
Yes
Yes
Yes
S h e e t
(Notes
1, 2)
Operation Complete
Sector Erase Command Sequence on page
No
No
Program/Erase
S29AL008D_00_A11 February 27, 2009
24.