AM29LV800D AMD [Advanced Micro Devices], AM29LV800D Datasheet

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AM29LV800D

Manufacturer Part Number
AM29LV800D
Description
8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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Data Sheet
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-
inally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
For new designs, S29AL008D supersedes Am29LV800D and is the factory-recommended migration
path. Please refer to the S29AL008D Data Sheet for specifications and ordering information.
Publication Number Am29LV800D_00 Revision A Amendment 4 Issue Date January 21, 2005

Related parts for AM29LV800D

AM29LV800D Summary of contents

Page 1

... AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order these products, please use only the Ordering Part Numbers listed in this document. For More Information Please contact your local AMD or Fujitsu sales office for additional information about Spansion memory solutions. Publication Number Am29LV800D_00 Revision A Amendment 4 Issue Date January 21, 2005 ...

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... PRELIMINARY Am29LV800D 8 Megabit ( 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory For new designs, S29AL008D supersedes Am29LV800D and is the factory-recommended migration path. Please refer to the S29AL008D Data Sheet for specifications and ordering information. Distinctive Characteristics Single power supply operation — ...

Page 4

... General Description The Am29LV800D Mbit, 3.0 volt-only Flash memory organized as 1,048,576 bytes or 524,288 words. The device is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. For more information, refer to publication number 21536. The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) data appears on DQ7– ...

Page 5

... Special Handling Instructions for FBGA Package .............. 7 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8 Standard Products ......................................................................8 Valid Combinations . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 10 Table 1. Am29LV800D Device Bus Operations .10 Word/Byte Configuration ...................................................... 10 Requirements for Reading Array Data ............................... 10 Writing Commands/Command Sequences .........................11 Program and Erase Operation Status ...................................11 Standby Mode ..............................................................................11 Automatic Sleep Mode ..............................................................11 RESET#: Hardware Reset Pin ...

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... 2.7–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Y-Decoder STB Timer X-Decoder Am29LV800D Am29LV800D -70 -90 -120 90 120 90 120 35 50 DQ0–DQ15 (A-1) Input/Output Buffers Data STB Y-Gating Cell Matrix Am29LV800D_00_A4_E January 21, 2005 ...

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... DQ4 DQ11 14 DQ3 DQ10 15 16 DQ2 17 DQ9 18 DQ1 19 DQ8 20 DQ0 January 21, 2005 Am29LV800D_00_A4_E Standard TSOP Reverse TSOP Am29LV800D 48 A16 47 BYTE DQ15/A-1 44 DQ7 43 DQ14 42 DQ6 41 DQ13 40 DQ5 39 DQ12 38 DQ4 37 ...

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... WE A10 39 A11 38 A12 37 A13 36 A14 35 A15 34 A16 33 BYTE DQ15/A-1 30 DQ7 29 DQ14 28 DQ6 27 DQ13 26 DQ5 25 DQ12 24 DQ4 DQ15/A DQ13 DQ6 DQ4 DQ11 DQ3 G2 H2 DQ9 DQ1 Am29LV800D_00_A4_E January 21, 2005 ...

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... Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# = Write enable RESET# = Hardware reset pin, active low RY/BY# = Ready/Busy# output January 21, 2005 Am29LV800D_00_A4_E 3.0 volt-only single power supply CC (see Product Selector Guide for speed options and voltage supply tolerances Device ground ...

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... Fine Pitch Ball Grid Array (FBGA) = 0.80 mm pitch, 6.15 x 8.15 mm package (VBK 048) SPEED OPTION See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE T = Top sector B = Bottom sector EC, EI, ED, EF, FC, FD, FF, FI, SC, SD, SF, SI EC, EI, ED,EF,FD, FF,FC, FI,SD, SFSC, SI Am29LV800D Am29LV800D_00_A4_E January 21, 2005 ...

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... AM29LV800DB-120 Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. January 21, 2005 Am29LV800D_00_A4_E Package Marking WBC ...

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... The command register itself does not occupy any addressable memory location. The register is composed of latches that store the commands, along with the address and data information needed to execute the command. The contents Table 1. Am29LV800D Device Bus Operations Operation CE# Read L Write ...

Page 13

... When the system is not reading or writing to the device, it can place the device in the standby mode. In this mode, current consumption is greatly reduced, and the outputs are placed in January 21, 2005 Am29LV800D_00_A4_E the high impedance state, independent of the OE# input. ...

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... Embedded Algorithms). The system can thus monitor RY/BY# to determine whether the reset operation is complete. If RESET# is asserted when a program or erase operation is not exe- cuting (RY/BY# pin is “1”), the reset operation is completed within a time of t READY Table 2. Am29LV800DT Top Boot Block Sector Addresses Sector A18 A17 A16 A15 SA0 ...

Page 15

... Table 3. Am29LV800DB Bottom Boot Block Sector Addresses Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 ...

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... Table 4. Am29LV800D Autoselect Codes (High Voltage Method) Description Mode CE# OE# Manufacturer ID: AMD L Device ID: Word L Am29LV800B Byte L (Top Boot Block) Device ID: Word L Am29LV800B (Bottom Boot Byte L Block) Sector Protection L Verification L = Logic Low = Logic High = V IL Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector ...

Page 17

... START RESET (Note 1) Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 1. Temporary Sector Unprotect Operation January 21, 2005 Am29LV800D_00_A4_E Am29LV800D 15 ...

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... Unprotect: Write 40h to sector address with Read from sector address with Set up next sector No address Data = 00h? Yes No Last sector verified? Yes Remove V ID from RESET# Write reset command Sector Unprotect complete Am29LV800D_00_A4_E January 21, 2005 ...

Page 19

... Resume Commands” for more infor- mation on this mode. The system must issue the reset command to re-enable the device for reading array data if January 21, 2005 Am29LV800D_00_A4_E the proper signals to the control pins to prevent unintentional writes when V V ...

Page 20

... Addresses are don’t care for both cycles. The device then returns to reading array data. Figure 1 illustrates the algorithm for the program operation. See the Erase/Program Operations table in “AC Characteristics” for parameters, and to Figure 1 for timing dia- grams. Am29LV800D Am29LV800D_00_A4_E January 21, 2005 ...

Page 21

... Any commands written to the chip during the Embedded Erase algorithm are ignored. Note that a hardware reset during the chip erase operation immediately terminates the opera- January 21, 2005 Am29LV800D_00_A4_E tion. The Chip Erase command sequence should be reinitiated once the device has returned to reading array data, to ensure data integrity ...

Page 22

... Further writes of the Resume command are ignored. Another Erase Suspend command can be written after the device has resumed erasing. Am29LV800D Am29LV800D_00_A4_E January 21, 2005 ...

Page 23

... System No Data = FFh? Yes Erasure Completed Notes: 1. See Table 5 for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 1. Erase Operation Table 5. Am29LV800D Command Definitions Command Sequence (Note 1) 1 Read (Note 6) 1 Reset (Note 7) Word Manufacturer ID ...

Page 24

... Polling produces a “1” on DQ7. This is analogous to the complement/true datum output described for the Embedded Program algorithm: the erase function changes all the bits in a sector to “1”; Am29LV800D 555 2AA 555 AAA 555 AAA 555 2AA AAA 555 Am29LV800D_00_A4_E January 21, 2005 10 30 ...

Page 25

... Timings (During Embedded Algorithms), in the “AC Characteristics” section illustrates this. Table 6 shows the outputs for Data# Polling on DQ7. Figure 1 shows the Data# Polling algo- rithm. January 21, 2005 Am29LV800D_00_A4_E START Read DQ7–DQ0 Addr = VA DQ7 = Data? ...

Page 26

... DQ5 is high (see the section on DQ5 is, the system should then determine again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as Am29LV800D Am29LV800D_00_A4_E January 21, 2005 ...

Page 27

... DQ7 (Data# Polling) or DQ6 (Toggle Bit I) to ensure the device has accepted the command sequence, and then read DQ3. If DQ3 is “1”, the internally controlled erase cycle has begun; all January 21, 2005 Am29LV800D_00_A4_E START Read DQ7–DQ0 Read DQ7– ...

Page 28

... Table 6. Write Operation Status DQ7 (Note DQ5 2) DQ6 (Note 1) DQ7# Toggle 0 0 Toggle toggle 0 Data Data Data DQ7# Toggle 0 Am29LV800D DQ2 RY/BY DQ3 (Note 2) # N/A No toggle 0 1 Toggle 0 N/A Toggle 1 Data Data 1 N/A N/A 0 Am29LV800D_00_A4_E January 21, 2005 ...

Page 29

... V –0.5 V –2 Figure 2. Maximum Negative Overshoot Waveform January 21, 2005 Am29LV800D_00_A4_E (Note –0 +4 A9, OE#, and RESET# (Note –0 +12.5 V All other pins (Note 1 –0 Output Short Circuit Current (Note 3) ...

Page 30

... 4.0 mA min I = –2 min I = –100 µ min . Typical CCmax Am29LV800D Am29LV800D_00_A4_E January 21, 2005 Min Typ Max Unit ±1.0 µA 35 µA ±1.0 µ 0.2 5 µA 0.2 5 µA ...

Page 31

... Figure 1. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note °C Figure 1. Typical I January 21, 2005 Am29LV800D_00_A4_E 1500 2000 2500 Time Frequency in MHz vs. Frequency CC1 Am29LV800D 3000 3500 4000 3 ...

Page 32

... Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Figure 1. Input Waveforms and Measurement Levels Am29LV800D Table 7. Test Specifications -90, -70 -120 1 TTL gate 30 100 5 0.0–3.0 1.5 1.5 OUTPUTS Changing, State Unknown 1.5 V Output Am29LV800D_00_A4_E January 21, 2005 Unit ...

Page 33

... OE#, Whichever Occurs First (Note 1) Notes: 1. Not 100% tested. 2. See Figure 1 and Table 7 for test specifications. Addresses CE# OE# WE# Outputs RESET# RY/BY Figure 1. Read Operations Timings January 21, 2005 Am29LV800D_00_A4_E Test Setup Read Toggle and Data# Polling t ...

Page 34

... Test Setup Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 1. RESET# Timings Am29LV800D All Speed Options Unit Max 20 Max 500 Min 500 Min 50 Min 20 Min Am29LV800D_00_A4_E January 21, 2005 µ µs ns ...

Page 35

... Std JEDEC t t CE# to BYTE# Switching Low or High ELFL/ ELFH BYTE# Switching Low to Output HIGH t FLQZ Z BYTE# Switching High to Output t FHQV Active January 21, 2005 Am29LV800D_00_A4_E Description Max Max Min Am29LV800D Speed Options -70 -90 -120 Unit ...

Page 36

... ELFL Data Output (DQ0–DQ14) DQ15 Output t FLQ t ELFH Data Data Output Output (DQ0–DQ14) Address DQ15 Input Output t FHQ The falling edge of the last WE# t SET ( HOLD and t specifications Am29LV800D Am29LV800D_00_A4_E January 21, 2005 Data Output Address Input ...

Page 37

... CC t Recovery Time from RY/BY Program/Erase Valid to RY/BY# Delay BUSY Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. January 21, 2005 Am29LV800D_00_A4_E Description Min Min Min Min Min Min Min Min ...

Page 38

... Illustration shows device in word mode. Figure 1. Program Operation Timings WPH A0h t BUSY is the true data at the program address. OUT Am29LV800D Read Status Data (last two cycles WHWH1 Status D OUT t RB Am29LV800D_00_A4_E January 21, 2005 ...

Page 39

... Notes sector address (for Sector Erase Valid Address for reading status data (see “Write Operation Status”). 2. Illustration shows device in word mode. Figure 1. Chip/Sector Erase Operation Timings January 21, 2005 Am29LV800D_00_A4_E 555h for chip erase ...

Page 40

... Complement Complement Status Data Status Data Valid Status Valid Status (first read) (second read) Am29LV800D VA High Z True Valid Data High Z Valid Data True VA VA Valid Status Valid Data (stops toggling) Am29LV800D_00_A4_E January 21, 2005 ...

Page 41

... RSP Sector Unprotect Note: Not 100% tested RESET VIDR CE# WE# RY/BY# Figure 1. Temporary Sector Unprotect January 21, 2005 Am29LV800D_00_A4_E Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 1. DQ2 vs. DQ6 Min Min Program or Erase Command Sequence ...

Page 42

... For sector protect For sector unprotect Figure 1. Sector Protect/Unprotect Valid* Valid* Verify 60h Sector Protect: 150 µs Sector Unprotect Timing Diagram Am29LV800D Am29LV800D_00_A4_E January 21, 2005 Valid* 40h Status ...

Page 43

... WHWH1 (Note Sector Erase Operation (Note 2) WHWH2 WHWH2 Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. January 21, 2005 Am29LV800D_00_A4_E Description Min Min Min Min Min Min Min Min ...

Page 44

... PA for program SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase Am29LV800D PA DQ7# D OUT OUT Am29LV800D_00_A4_E January 21, 2005 = ...

Page 45

... Excludes 00h programming prior to erasure s µs µs Excludes system level s overhead (Note 5) s ° 1,000,000 cycles. CC Min Max –1.0 V 12.5 V –1 1 –100 mA +100 mA Typ Max = Min Unit 10 Years 20 Years Am29LV800D_00_A4_E January 21, 2005 Unit ...

Page 46

... Physical Dimensions* TS 048—48-Pin Standard TSOP * For reference only. BSC is an ANSI standard for January 21, 2005 Am29LV800D_00_A4_E Basic Space Centering. Am29LV800D Dwg rev AA; 10/99 44 ...

Page 47

... Physical Dimensions TSR048—48-Pin Reverse TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering Am29LV800D Am29LV800D_00_A4_E January 21, 2005 Dwg rev AA; 10/99 ...

Page 48

... Physical Dimensions FBB 048—48-Ball Fine-Pitch Ball Grid Array (FBGA January 21, 2005 Am29LV800D_00_A4_E Am29LV800D Dwg rev AF; 10/99 46 ...

Page 49

... WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 8. NOT USED. 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. Am29LV800D Am29LV800D_00_A4_E January 21, 2005 ...

Page 50

... Physical Dimensions SO 044—44-Pin Small Outline Package January 21, 2005 Am29LV800D_00_A4_E Am29LV800D Dwg rev AC; 10/99 48 ...

Page 51

... Revision Summary Revision A (January 19, 2004) Changed data sheet status to Advance Informa- tion to indicate new 0.23 µm process tech- nology. The base device part number has changed from Am29LV800B to Am29LV800D. Specifications for CC1 WHWH1 changed. Extended temperature is no longer available. All other specifications in the data sheet remain unchanged ...

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