AM29LV800DT-70EC AMD (ADVANCED MICRO DEVICES), AM29LV800DT-70EC Datasheet - Page 26

• Manufacturer Part Number: AM29LV800DT-70EC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29LV800DT-70EC

• Lead Free Status / Rohs Status: Not Compliant

Legend
X = Don’t care
RA = Address of the memory location to be read
RD = Data read from location RA during read operation, and
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A18–A12 uniquely select any sector.
Notes
1. See
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operations.
4. Data bits DQ15–DQ8 are don’t cares for unlock and command cycles.
5. Address bits A18–A11 are don’t cares for unlock and command cycles, unless PA or SA required.
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high (while the device is providing status
8. The fourth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See
10. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
11. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode.
12. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is
13. The Erase Resume command is valid only during the Erase Suspend mode.
26
Read
Reset
Program
Unlock Bypass
Unlock Bypass Program
Unlock Bypass Reset
Chip Erase
Sector Erase
Erase Suspend
Erase Resume
data).
valid only during a sector erase operation.
(Note 6)
Manufacturer ID
Device ID,
Top Boot Block
Device ID,
Bottom Boot Block
Sector Protect Verify
(Note 9)
(Note 7)
Table 7.1 on page 14
(Note 13)
Command
(Note 12)
Sequence
(Note 1)
(Note 11)
(Note 10)
for a description of bus operations.
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
1
1
4
4
4
4
4
3
2
2
6
6
1
1
Table 8.1 S29AL008D Command Definitions
Addr
XXX
AAA
AAA
AAA
AAA
AAA
AAA
XXX
XXX
AAA
AAA
XXX
XXX
555
555
555
555
555
555
555
555
RA
First
Data
RD
AA
AA
AA
AA
AA
AA
A0
AA
AA
B0
F0
90
30
Addr
XXX
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
555
555
555
555
555
555
555
555
PA
Second
S29AL008D
Data
(F0)
D a t a
PD
Autoselect Command Sequence on page 22
55
55
55
55
55
55
00
55
55
Addr
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
555
555
555
555
555
555
555
555
S h e e t
Bus Cycles (Notes 2-5)
Third
Data
A0
90
90
90
90
20
80
80
Addr
(SA)
(SA)
AAA
AAA
X00
X01
X02
X01
X02
X02
X04
555
555
PA
S29AL008D_00_A11 February 27, 2009
Fourth
22DA
XX00
XX01
225B
Data
PD
DA
5B
AA
AA
01
00
01
for more information.
Addr
2AA
2AA
555
555
Fifth
Data
55
55
Addr
AAA
555
SA
Sixth
Data
10
30