IDTQS5LV919-133Q IDT, Integrated Device Technology Inc, IDTQS5LV919-133Q Datasheet - Page 6

• Manufacturer Part Number: IDTQS5LV919-133Q
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Driverr

Specifications of IDTQS5LV919-133Q

• Number Of Elements: 1
• Pll Input Freq (min): 2.5MHz
• Pll Input Freq (max): 100MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: QSOP
• Output Frequency Range: 5 to 133MHz
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Pin Count: 28
• Lead Free Status / Rohs Status: Not Compliant

NOTES:
1. Figure 1 shows an analog isolation scheme which will be effective in most applications. The following guidelines should be followed to ensure stable and jitter-free operation:
2. The bypass capacitors can be ceramic chip capacitors. There should be a 0.1µF bypass capacitor between each of the other (digital) four V
QS5LV919
3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
This will reduce output switching noise caused by the QS5LV919 outputs, in addition to reducing potential for noise in the "analog" section of the chip. These bypass capacitors
should also be tied as close to the QS5LV919 package as possible.
a. All analog isolation components should be tied as close to the package as possible. Stray current passing through the parasitics of long traces can cause undesirable voltage
b. The 10µF low frequency bypass capacitor and the 0.1µF high frequency bypass capacitor form a wide bandwidth filter that will minimize the QS5LV919's sensitivity to voltage
transients.
transients from the system digital V
If good bypass techniques are used on a board design near components which may cause digital V
digital V
transients that can occur in a high frequency, high speed digital system.
CC
supply. The purpose of the bypass filtering scheme shown in figure 1 is to give the QS5LV919 additional protection from the power supply and ground plane
Bypass
10
Freq.
Low
μ
F
CC
Bypass
0.1
Freq.
High
supply and ground planes.
Figure 1. Recommended Analog Isolation Scheme for the QS5LV919
μ
F
A separate Analog power supply is not necessary
and should not be used.
scribed guidelines is all that is necessary to use
the QS5LV919 in a normal digital environment.
ANALOG V
ANALOG G ND
BOARD V
BOARD GND
6
CC
C C
Following these pre-
DIGITAL
CC
DIGITAL
V
GND
and ground noise, V
CC
CC
step deviations should not occur at the QS5LV919's
INDUSTRIAL TEMPERATURE RANGE
Bypass
CC
0.1
pins and the board ground plane.
μ
F