LAXP2-17E-5FTN256E Lattice, LAXP2-17E-5FTN256E Datasheet - Page 48

• Manufacturer Part Number: LAXP2-17E-5FTN256E
• Description: IC FPGA AUTO 17K LUTS 256-BGA
• Manufacturer: Lattice

Specifications of LAXP2-17E-5FTN256E

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Initialization Supply Current
I
I
I
I
I
1. For further information on supply current, see TN1139,
2. Assumes all outputs are tristated, all inputs are con• gured as LVCMOS and held at the V
3. Frequency 0MHz.
4. Does not include additional current from bypass or decoupling capacitor across the supply.
5. A specific configuration pattern is used that scales with the size of the device; consists of 75% PFU utilization, 50% EBR, and 25% I/O con-
6. T
7. In fpBGA packages the PLLs are connected to and powered from the auxiliary power supply. For these packages, the actual auxiliary sup-
CC
CCAUX
CCPLL
CCIO
CCJ
figuration.
ply current is the sum of I
power supply.
J
Symbol
= 25°C, power supplies at nominal voltage.
Core Power Supply Current
Auxiliary Power Supply Current
PLL Power Supply Current (per PLL)
Bank Power Supply Current (per Bank)
VCCJ Power Supply Current
CCAUX
and I
CCPLL.
Parameter
Over Recommended Operating Conditions
For csBGA, PQFP and TQFP packages the PLLs are powered independent of the auxiliary
1, 2, 3, 4, 5
7
Power Estimation and Management for LatticeXP2
3-4
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
Device
DC and Switching Characteristics
LA-LatticeXP2 Family Data Sheet
CCIO
or GND.
(25°C, Max. Supply)
Typical
112
1.8
6.4
1.2
20
21
44
67
74
Devices.
6
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA