LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 286
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LFE2-20E-5FN256I
Manufacturer Part Number
LFE2-20E-5FN256I
Description
IC FPGA 21KLUTS 193I/O 256FPBGA
Manufacturer
Lattice
Series
ECP2r
Datasheets
1.LFE2-12SE-6FN256C.pdf
(389 pages)
2.LFE3-35EA-8FN672I.pdf
(21 pages)
3.LFE2-20E-5FN256I.pdf
(4 pages)
4.LFE2-20E-5FN256I.pdf
(769 pages)
Specifications of LFE2-20E-5FN256I
Number Of Logic Elements/cells
21000
Number Of Labs/clbs
2625
Total Ram Bits
282624
Number Of I /o
193
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-BGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1170
LFE2-20E-5FN256I
Q6411457
LFE2-20E-5FN256I
Q6411457
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-20E-5FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- LFE2-12SE-6FN256C PDF datasheet
- LFE3-35EA-8FN672I PDF datasheet #2
- LFE2-20E-5FN256I PDF datasheet #3
- LFE2-20E-5FN256I PDF datasheet #4
- Current page: 286 of 389
- Download datasheet (5Mb)
LFE2M35E/SE and LFE2M50E/SE Logic Signal Connections: 672 fpBGA
Lattice Semiconductor
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
*** For density migration, board design must take into account that these sysCONFIG pins are dual function for the lower density devices
****Due to packaging bond out option, this DQS does not have all the necessary DQ pins bonded out for a full 8-bit data width.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one
connection with a package ball or pin.
Number
AC20
AC21
AC22
AC23
AC25
AD26
AB21
W20
Ball
G19
V10
V18
P20
W7
J17
H7
K6
P7
R8
(ECP2M20 and ECP2M35). They can be either sysCONFIG pins or general purpose I/Os. These pins are dedicated pins for the higher den-
sity devices (ECP2M50, ECP2M70 and ECP2M100).
R_VCCPLL
R_VCCPLL
R_VCCPLL
R_VCCPLL
L_VCCPLL
L_VCCPLL
L_VCCPLL
L_VCCPLL
Function
Ball/Pad
PB69B
PB58A
PB63A
PB69A
PB71A
PB71B
PB70B
PB72B
NC
NC
Bank
4
4
4
4
4
4
4
4
-
-
-
-
-
-
-
-
-
-
LFE2M35E/SE
Dual Function
BDQS69****
BDQ69
BDQ60
BDQ60
BDQ69
BDQ69
BDQ69
BDQ69
Differential
4-183
C
T
T
T
T
C
C
C
R_VCCPLL
R_VCCPLL
R_VCCPLL
R_VCCPLL
L_VCCPLL
L_VCCPLL
L_VCCPLL
L_VCCPLL
Function
Ball/Pad
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
LatticeECP2/M Family Data Sheet
Bank
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LFE2M50E/SE
Dual Function
Pinout Information
Differential
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