LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 212
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-20E-5FN256I
Manufacturer Part Number
LFE2-20E-5FN256I
Description
IC FPGA 21KLUTS 193I/O 256FPBGA
Manufacturer
Lattice
Series
ECP2r
Datasheets
1.LFE2-12SE-6FN256C.pdf
(389 pages)
2.LFE3-35EA-8FN672I.pdf
(21 pages)
3.LFE2-20E-5FN256I.pdf
(4 pages)
4.LFE2-20E-5FN256I.pdf
(769 pages)
Specifications of LFE2-20E-5FN256I
Number Of Logic Elements/cells
21000
Number Of Labs/clbs
2625
Total Ram Bits
282624
Number Of I /o
193
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-BGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1170
LFE2-20E-5FN256I
Q6411457
LFE2-20E-5FN256I
Q6411457
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-20E-5FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- LFE2-12SE-6FN256C PDF datasheet
- LFE3-35EA-8FN672I PDF datasheet #2
- LFE2-20E-5FN256I PDF datasheet #3
- LFE2-20E-5FN256I PDF datasheet #4
- Current page: 212 of 389
- Download datasheet (5Mb)
LFE2-70E/SE Logic Signal Connections: 900 fpBGA
Lattice Semiconductor
Ball Number
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
GND
GND
GND
GND
GND
H4
G5
D2
D1
G1
G2
H8
H6
G4
G3
H7
H5
H2
H1
F4
F3
E2
E1
F1
F2
K6
K8
K2
J6
J8
J2
J1
J5
J7
J4
J3
Ball/Pad Function
GNDIO7
GNDIO7
GNDIO7
GNDIO7
GNDIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
PL14A
PL14B
PL15A
PL15B
PL18A
PL18B
PL19A
PL19B
PL20A
PL20B
PL21A
PL21B
PL22A
PL22B
PL23A
PL23B
PL24A
PL24B
PL25A
PL25B
PL26A
PL26B
PL27A
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL5A
PL5B
LFE2-70E/SE
Bank
4-109
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
-
-
-
-
-
LUM1_SPLLC_FB_A/LDQ12
LUM1_SPLLC_IN_A/LDQ12
LUM1_SPLLT_FB_A/LDQ12
LUM1_SPLLT_IN_A/LDQ12
LatticeECP2/M Family Data Sheet
Dual Function
VREF2_7
VREF1_7
LDQS21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ21
LDQ29
LDQ29
LDQ29
LDQ29
LDQ29
Pinout Information
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
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