MT9M001C12STM-EVAL Micron Technology Inc, MT9M001C12STM-EVAL Datasheet - Page 15

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MT9M001C12STM-EVAL

Manufacturer Part Number
MT9M001C12STM-EVAL
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT9M001C12STM-EVAL

Lead Free Status / Rohs Status
Compliant
Table 7:
PDF: 09005aef81c2856f/Source: 09005aef80a3e031
MT9M001_DS_2.fm - Rev. F 5/06 EN
Register
Chip ID
Window Control
These registers control the size of the window.
Blanking Control
These registers control the blanking time in a row (called column fill-in or horizontal blanking) and between frames
(vertical blanking). Horizontal blanking is specified in terms of pixel clocks. Vertical blanking is specified in terms of row
readout times. The actual imager timing can be calculated using Table 4, “Frame Timing,” on page 10.
Output Control
This register controls various features of the output format for the sensor.
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
Register Description
15:0
10:0
10:0
10:0
10:0
10:0
10:0
Bit
0
1
2
3
6
This register is read-only and gives the chip identification number: 0x8431.
First row to be read out
First column to be read out
Register value must be an even number.
Window height (number of rows - 1)
Minimum value for 0x03 = 0x0002.
Window width (number of columns - 1)
Register value must be an odd number.
Minimum value for 0x04 = 0x0003.
Horizontal Blanking
Vertical Blanking
Synchronize changes (copied to Reg0xF1, bit1).
0 = normal operation. Update changes to registers that affect image brightness (integration time,
integration delay, gain, horizontal blanking and vertical blanking, window size, row/column skip or
row mirror) at the next frame boundary. The “frame boundary” is 8 row_times before the rising
edge of FRAME_VALID. (If “Show Dark Rows” is set, it will be coincident with the rising edge of
FRAME_VALID.)
1 = do not update any changes to these settings until this bit is returned to “0.”
Chip Enable (copied to Reg0xF1, bit0).
1 = normal operation.
0 = stop sensor readout. When this is returned to “1,” sensor readout restarts at the starting row in
a new frame. The digital power consumption can then also be reduced to less than 5uA by turning
off the master clock.
Reserved
Reserved
Use Test Data.
When set, a test pattern will be output instead of the sampled image from the sensor array. The
value sent to the D
columns and the inverse of the Test Data register for odd columns. The output “image” will have
the same width, height, and frame rate as it would otherwise have. No digital processing (gain or
offset) is applied to the data. When clear (the default), sampled pixel values are output normally.
default is 0; set to zero at all times.
default is 0; set to zero at all times.
OUT
default = 0x0019 (25 rows).
default = 0x0009 (9 pixels).
[9:0] pins will alternate between the Test Data register (Reg0x32) in even
default = 0x000C (12).
MT9M001: 1/2-Inch Megapixel Digital Image Sensor
default = 0x0014 (20).
15
default = 0x03FF (1023).
default = 0x04FF (1279).
Description
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
Registers