S29GL256S10TFI010 Spansion Inc., S29GL256S10TFI010 Datasheet - Page 61

• Manufacturer Part Number: S29GL256S10TFI010
• Description: Flash 256 MBIT 3V 100NS PAGE MODE FLASH
• Manufacturer: Spansion Inc.

Specifications of S29GL256S10TFI010

• Data Bus Width: 16 bit
• Memory Type: Flash
• Memory Size: 256 Mbit
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: CFI
• Access Time: 100 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 100 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSOP-56
• Lead Free Status / Rohs Status: Compliant

February 11, 2011 S29GL_128S_01GS_00_01
Lower Software Bits
Upper Software Bits
Word Address
Word Address
D a t a
(SA) + 001Ah
(SA) + 001Bh
(SA) + 001Ch
(SA) + 001Dh
(SA) + 001Eh
(SA) + 0010h
(SA) + 0011h
(SA) + 0012h
(SA) + 0013h
(SA) + 0014h
(SA) + 0015h
(SA) + 0016h
(SA) + 0017h
(SA) + 0018h
(SA) + 0019h
(SA) + 001Fh
(SA) + 0020h
(SA) + 0021h
(SA) + 0022h
(SA) + 0023h
(SA) + 0024h
(SA) + 0025h
(SA) + 0026h
Description
Device ID
Device ID
S h e e t
0011h (512 Mb)
0010h (256 Mb)
000Fh (128 Mb)
(SA) + 000Ch
(SA) + 000Dh
(SA) + 000Eh
(SA) + 000Fh
0012h (1 Gb)
Address
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
0027h
0036h
0000h
0000h
0008h
0009h
0008h
0001h
0002h
0003h
0003h
Data
Data
( A d v a n c e
Table 6.2 ID (Autoselect) Address Map (Sheet 2 of 2)
Table 6.3 CFI Query Identification String
GL-S MirrorBit
Table 6.4 CFI System Interface String
Bit 0 - Status Register Support
Bit 1 - DQ polling Support
Bit 3-2 - Command Set Support
Bits 4-15 - Reserved = 0
Reserved
2228h = 1 Gb
2223h = 512 Mb
2222h = 256 Mb
2221h = 128 Mb
2201h
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set
(00h = none exists)
Address for Alternate OEM Extended Table
(00h = none exists)
V
V
V
V
Typical timeout per single word write 2
Typical timeout for max
multi-byte program, 2
(00h = not supported)
Typical timeout per individual block erase 2
Typical timeout for full chip erase 2
Max. timeout for single word write 2
Max. timeout for buffer write 2
Max. timeout per individual block erase 2
Max. timeout for full chip erase 2
(00h = not supported)
CC
CC
PP
PP
1 = Status Register Supported
0 = Status Register not supported
1 = DQ bits polling supported
0 = DQ bits polling not supported
11 = reserved
10 = reserved
01 = Reduced Command Set
00 = Classic Command set
Min. voltage (00h = no V
Max. voltage (00h = no V
Min. (erase/program) (D7-D4: volts, D3-D0: 100 mV)
Max. (erase/program) (D7-D4: volts, D3-D0: 100 mV)
I n f o r m a t i o n )
®
Family
N
µs
PP
PP
N
times typical
pin present)
N
pin present)
times typical
N
N
ms (00h = not supported)
times typical
N
Description
Description
Read Data
µs
N
times typical
N
ms
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