TS68C429AMFA E2V, TS68C429AMFA Datasheet - Page 32

• Manufacturer Part Number: TS68C429AMFA
• Manufacturer: E2V

Specifications of TS68C429AMFA

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -55C to 125C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 132
• Lead Free Status / Rohs Status: Compliant

9.4.2
32
0848E–HIREL–02/08
Self-test Use
The self-test destroys the content of the tested memory. So, it could be used after system reset, during
system initialization. Only one self-test (transmitters and receivers) can be performed after a reset. If the
self-test must be restarted, the reset must be activated (then released) before the new self-test start.
To program the self-test:
To read the self-test result, the user must:
1. If the receiver self-test will be used:
2. If receiver self-test will be used and CLK-SYS is > 10 MHz:
3. Start self-test:
1. poll the self-test register and wait for an end of test set to 1 (bits 8 to 10, bit 14) then,
2. read the self-test register again to have a valid result on bits 11, 12, 13, 15 according to the
bit 11: Result of Transmitter 1 self-test:
bit 12: Request of Transmitter 2 self-test:
bit 13: Result of Transmitter 3 self-test:
bit 14:
bit 15: Result of receiver LCM self-test:
set to 1 LCMWE bits (for all receivers).
set to self-test register bit 5.
set to 1 self-test register bit 6 for Transmitter test,
set to 1 self-test register bit 7 for Receiver RAM test.
At this point, self-test is running. The test duration is:
710 CLK-SYS periods for Transmitter self-test,
2820 CLK-SYS periods for Receiver RAM test if self-test register bit 5 is 0,
5640 CLK-SYS periods for Receiver RAM test if self-test register bit 5 is 1.
tests which end at point 1.
0: (if bit 8 is set to 1) self-test pass,
1: Self-test fail.
0: (if bit 9 is set to 1) self-test pass,
1: Self-test fail.
0: (if bit 10 is set to 1) self-test pass,
1: Self-test fail.
0: Receiver Label Control Matrix self-test is running,
1: End of receiver Label Control Matrix self-test.
0: (if bit 14 is set to 1) self-test pass,
1: Self-test fail.
e2v semiconductors SAS 2008
TS68C429A