XCARD XC-1 XMOS, XCARD XC-1 Datasheet - Page 17

• Manufacturer Part Number: XCARD XC-1
• Description: BOARD DEV KIT XS1-G4
• Manufacturer: XMOS
• Series: XCore™r
• Type: MCUr

Specifications of XCARD XC-1

• Contents: Board, Cable
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: XS1-G4
• Other names: 880-1013

XS1-G4 144BGA Datasheet (3.5)
with respect to the incoming data. For further details on these parameters and on
The asynchronous nature of links means that the relative phasing of SS_CLK clocks is
The JTAG interface may be operated in either synchronous or asynchronous mode.
absolute numbers since the G4 provides functionality to delay the incoming clock
interfacing to higher speed synchronous interfaces see the relevant application note.
3.9 XMOS Link Interface Performance
not important in a multi-clock system, providing each meets the required stability
criteria.
3.10 JTAG Timing
Notes:
Symbol
B(2blink_5)
B(5blink_5)
Parameters
SS_TCLK period
TSU
TH
TCO
1. Timing applies to SS_TMS, SS_TRST, SS_TDI inputs
2. Timing applies to SS_TDO output
Parameter
2b link bandwidth (Nominal
load)
5b link bandwidth (Nominal
load)
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MIN
30
5
MIN
TYP
TYP
MAX
10
15
MAX
160
400
UNITS
ns
ns
ns
ns
UNITS
Mb/s
Mb/s
Notes
1
1
2
Notes
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