XCARD XC-1 XMOS, XCARD XC-1 Datasheet - Page 10

BOARD DEV KIT XS1-G4

XCARD XC-1

Manufacturer Part Number
XCARD XC-1
Description
BOARD DEV KIT XS1-G4
Manufacturer
XMOS
Series
XCore™r
Type
MCUr

Specifications of XCARD XC-1

Contents
Board, Cable
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
XS1-G4
Other names
880-1013
XS1-G4 144BGA Datasheet (3.5)
The XS1-G family supports a generic 5pin JTAG interface, which can be used to
The JTAG connectors on the XCore are:
The JTAG controller has access to the following registers for an XCore:
2.3 JTAG Operation
provide hardware testing including:
Each XCore and Switch has a JTAG controller with a 10-bit instruction register (IR) and
a 32-bit data register (DR). A mux controller selects the XCore the TMS is routed to,
and which device TDO is wired to the chip level output. TDO can output in tristate in
accordance with the JTAG specification. The JTAG controller supports the following
commands:
Signal
SS_TCK
SS_TMS
SS_TRST
SS_TDI
SS_TDO
Symbol
1111111111
0000000100
0000001000
0000001100
aaaaaaaa01
aaaaaaaa10
Boundary scan testing for correct board connectivity
Onboard source level debugging from remote terminals
Boundary scanning for OTP ROM
Pin ID
H9
J5
J9
J8
J6
Function
BYPASS
SAMPLE
PRELOAD
EXTEST
PEEK
POKE
I/O
I, PU, ST
I, PU
I, PU, ST
I, PU
OT, PU
www.xmos.com
Description
See IEEE 1149.1
documentation
Copies shared register contents, into data regis-
ter (a=address register bits)
Copies data register contents into shared regis-
ter (a=address register bits)
Function
TCK
TMS
TRST
TDI
TDO
Description
Test clock
Test mode select
Test reset (optional)
Test data in
Test data out
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