AN983BX-BG-T-V1 Infineon Technologies, AN983BX-BG-T-V1 Datasheet - Page 49

• Manufacturer Part Number: AN983BX-BG-T-V1
• Description: IC PCI TO ETHERNET LAN 128-PQFP
• Manufacturer: Infineon Technologies

Specifications of AN983BX-BG-T-V1

• Applications: Ethernet Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AN983BXBGTV1; AN983BXBGTV1XP; SP000075554

Power Management Register 1
PMR1_CR49
Power Management Register 1
Field
Res
PMES
DSCAL
DSEL
PME_En
Res
PWRS
Data Sheet
Bits
31:16
15
14:13
12:9
8
7:2
1:0
Type
ro
rw*
ro
rw
rw
ro
rw
Registers and Descriptors DescriptionAN983B/BX Configuration Registers
Description
Reserved
PME Status
This bit is set when the AN983B/BX would normally assert the PME#
signal for wake-up event, this bit is independent of the state of the PME-
En bit. Writing a “1” to this bit will clear it and cause the AN983B/BX to
stop asserting a PME# (if enabled). Writing a “0” has no effect.
Note: rw*: Read and Write Clear
Data Scale
Indicates the scaling factor to be used when interpreting the value of the
Data register. This field is required for any function that implements the
Data register. Otherwise, it’s optional.The AN983B/BX doesn’t support
Data register and Data_Scale.
Data Select
This four-bit field is used to select which data is to be reported through the
Data register and Data_Scale field. This field is required for any function
that implements the Data register. The AN983B/BX doesn’t support
Data_Select.
PME En
“1” enables the AN983B/BX to assert PME#. When “0” disables the
PME# assertion. Magic packet default enable: When Csr18 <18> and
csr18 <19> are set to 1, than the magic packet wake up event will be
default enabled (csr13 <9> be set) it doesn’t matter the PME_En is set or
not.
Reserved
Power State
This two-bit field is used both to determine the current power state of the
AN983B/BX and to set the AN983B/BX into a new power state. The
definition of this field is given below.
Note: This field is auto cleared to D0 when power resumed.
00
01
10
11
B
B
B
B
D0,
D1,
D2,
D3hot,
Offset
C4
49
H
Rev. 1.81, 2005-12-15
AN983B/BX
Reset Value
0000 0000
H