ISD-300A1 Cypress Semiconductor Corp, ISD-300A1 Datasheet - Page 46

• Manufacturer Part Number: ISD-300A1
• Description: IC USB 2.0 BRIDGE BULK 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of ISD-300A1

• Applications: USB 2.0 to ATA/ATAPI Bridge
• Interface: ATA, ATAPI
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1459

October 19, 2001
Operation Control
NEJECT, NCART_DET Pins – USB Remote Wakeup and Event Notification
These pins are used to trigger USB remote-wakeup as well as ATA Event Notification. When asserted low
NEJECT indicates that a media eject request occurred. When asserted low NCART_DET indicates that a
media cartridge is present. For NEJECT, the pin value must remain static for 10 ms before any state
change is detected by internal state machine logic. For NCART_DET, any asynchronous change in state
after the signal retains a static value for more than 10 ms is detected by internal state machine logic.
GPIO Pins – General Purpose IO
The GPIO pins enable general purpose IO for miscellaneous use. Each GPIO pin has independent 3-state
control, with an internal pull down resistor (50K ohm typically). The GPIO pins input, output, and 3-state
control span three bytes of configuration space. The chosen implementation methodology does not allow
read and write operations between GPIO[9:8] and GPIO[7:0] to occur during the same clock period.
I_MODE Pin – Vendor Specific Identify (FBh) ATA Command (I_MODE)
Asserting the I_MODE pin high enables ISD-300A1 configuration and USB Descriptor data retrieval from
an attached device via a vendor specific ATA command (FBh) rather than an external I
Unlike operation with an external I
be initialized and FBh data retrieved before the ISD-300A1 can allow USB enumeration. To meet USB
specification requirements, I_MODE operation must be limited to systems that draw 100 mA or less from
VBUS prior to USB enumeration.
SYS_IRQ Pin – USB Interrupt
The SYS_IRQ pin provides a way for systems to request service from host software by use of the USB
Interrupt pipe. If the ISD-300A1 has no pending interrupt data to return, USB interrupt pipe data requests
are NAK’d. If pending data is available, the ISD-300A1 returns 16-bits of data indicating the state of the
GPIO[9:0] and DISK_READY pins. Table 22 and Figure 4 depicts the bit map and latching algorithm
incorporated by the ISD-300A1.
Table 22 – USB Interrupt Pipe Data
7
! During read operations GPIO[9:8] are sampled one clock period (33ns) prior to GPIO[7:0]
! During write operations GPIO[9:8] 3-state control and output values are latched one clock period
USB Interrupt Data Byte 1 Bit Map
6
(assuming the read operation spans all GPIO register space).
(33ns) prior to GPIO[7:0] 3-state control and output values (assuming the write operation spans all
GPIO register space).
5
4
3
2
C memory device, I_MODE operation requires the attached device first
2
1
0
41
7
USB Interrupt Data Byte 0 Bit Map
6
5
4
3
2
C memory device.
2
ISD-300A1
1
0