ISD-300A1 Cypress Semiconductor Corp, ISD-300A1 Datasheet - Page 44

no-image

ISD-300A1

Manufacturer Part Number
ISD-300A1
Description
IC USB 2.0 BRIDGE BULK 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of ISD-300A1

Applications
USB 2.0 to ATA/ATAPI Bridge
Interface
ATA, ATAPI
Voltage - Supply
3 V ~ 3.6 V
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1459

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISD-300A1
Manufacturer:
CYP
Quantity:
20 000
Company:
Part Number:
ISD-300A1
Quantity:
963
October 19, 2001
ISD-300A1
DRV_PWR_VALID Pin
The DRV_PWR_VALID input pin is typically enabled only in Hybrid powered systems, or systems in which
the ISD-300A1 receives power from VBUS, and the device receives power from another source. In VBUS
or self powered systems DRV_PWR_VALID is typically not utilized. In Hybrid powered systems,
DRV_PWR_VALID indicates if the device is powered or at least attached and qualifies device
operation.
DRV_PWR_VALID active polarity and enabling is controlled during ISD-300A1 configuration. It is
active high in systems that can supply a power indication from the drive. It is active low in systems that
utilize a “grounding scheme” to indicate when the cable is connected to the device. If enabled, and
DRV_PWR_VALID is not determined active after the ISD-300A1 configuration data is loaded, the ISD-
300A1 enters a low power mode of operation (similar to USB suspend state when in VBUS powered
operation. See Table 21 – ATA Interface Line States on page 40 for more information). Asserting
DRV_PWR_VALID enables resume from the low power operation state.
This signal may also be used in conjunction with ATA_EN to force the ISD-300A1 to disable the USB
interface and operate in a low power state when sharing the ATA interface.
VBUS_PWR_VALID Pin
This input pin indicates that VBUS power is present at the USB
connector.
VBUS_PWR_VALID qualifies
driving the system’s 1.5K ohm pull-up resistor on D+ when the system is externally powered (the USB
specification only allows the device to source power to D+ when the host is powered). After the ISD-
300A1 configuration data is loaded, if VBUS_PWR_VALID is inactive the ISD-300A1 enters a low power
mode of operation. Asserting VBUS_PWR_VALID resumes operation from the low power state.
DISK_READY Pin
This input pin indicates the attached device is powered and ready to begin communication with the ISD-
300A1. DISK_READY qualifies the start of the ISD-300A1’s initialization sequence. A state change from
0 to 1 on DISK_READY will cause the ISD-300A1 to wait for 25 ms before asserting NATA_RESET and
re-initialize the device. The ATA interface state machines remain inactive and all of the ATA interface
signals are driven logic ‘0’ if DISK_READY is not asserted (assuming ATA_EN = ‘1’). This input is not
used in conjunction with DRV_PWR_VALID, and should be tied to logic ‘1’ in hybrid powered systems.
DISK_READY is filtered for 25 ms on the rising edge and cleared asynchronously on the falling edge.
NLOWPWR Pin
When active, the NLOWPWR pin indicates the ISD-300A1 is operating in a low power state.
NPWR500 Pin
The NPWR500 output pin indicates the USB host has configured the ISD-300A1 USB interface for VBUS
powered operation (VBUS_POWERED pin active), granting the requested amount of power for the
peripheral (the bMaxPower entry from descriptor set 1). In the case of a USB suspend condition,
NPWR500 is de-asserted and the ISD-300A1 enters a low power state of operation. Upon a resume
condition, the ISD-300A1 will resume normal operation and restore NPWR500 accordingly. Note: ISD-
300A1 power sources should not be controlled at any time by using the NPWR500 pin.
39

Related parts for ISD-300A1