UJA1069TW24/5V0:51 NXP Semiconductors, UJA1069TW24/5V0:51 Datasheet - Page 7

• Manufacturer Part Number: UJA1069TW24/5V0:51
• Description: IC LIN FAIL-SAFE 24-HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1069TW24/5V0:51

• Applications: Automotive
• Interface: LIN (Local Interconnect Network)
• Voltage - Supply: 5V
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280013518; UJA1069TW24/5V0-T; UJA1069TW24/5V0-T

NXP Semiconductors
6. Functional description
UJA1069_3
Product data sheet
6.1 Introduction
6.2 Fail-safe system controller
Table 2.
The exposed die pad at the bottom of the package allows better dissipation of heat from
the SBC via the printed-circuit board. The exposed die pad is not connected to any active
part of the IC and can be left floating, or can be connected to GND for the best EMC
performance.
The UJA1069 combines all peripheral functions around a microcontroller within typical
automotive networking applications into one dedicated chip. The functions are as follows:
The fail-safe system controller is the core of the UJA1069 and is supervised by a
watchdog timer which is clocked directly by the dedicated on-chip oscillator. The system
controller manages the register configuration and controls all internal functions of the
SBC. Detailed device status information is collected and presented to the microcontroller.
The system controller also provides the reset and interrupt signals.
The fail-safe system controller is a state machine. The different operating modes and the
transitions between these modes are illustrated in
further details about the SBC operating modes.
Symbol
V3
SENSE
BAT42
•
•
•
•
•
•
•
•
•
•
•
•
Power supply for the microcontroller
Switched BAT42 output
System reset
Watchdog with Window mode and Time-out mode
On-chip oscillator
LIN transceiver for serial communication
SPI control interface
Local wake-up input
Inhibit or limp-home output
System inhibit output port
Compatibility with 42 V power supply systems
Fail-safe behavior
Pin description
Pin
HTSSOP32 HTSSOP24
30
31
32
Rev. 03 — 10 September 2007
22
23
24
…continued
Description
unregulated 42 V output (BAT42 related; continuous
output, or cyclic mode synchronized with local wake-up
input)
fast battery interrupt / chatter detector input
42 V battery supply input (connect this pin to BAT14 in
14 V applications)
Figure
LIN fail-safe system basis chip
4. The following sections give
UJA1069
© NXP B.V. 2007. All rights reserved.
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