UJA1069TW24/5V0:51 NXP Semiconductors, UJA1069TW24/5V0:51 Datasheet - Page 35

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UJA1069TW24/5V0:51

Manufacturer Part Number
UJA1069TW24/5V0:51
Description
IC LIN FAIL-SAFE 24-HTSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1069TW24/5V0:51

Applications
Automotive
Interface
LIN (Local Interconnect Network)
Voltage - Supply
5V
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935280013518
UJA1069TW24/5V0-T
UJA1069TW24/5V0-T
NXP Semiconductors
Table 12.
[1]
[2]
[3]
Table 13.
[1]
[2]
Table 14.
UJA1069_3
Product data sheet
Bit
4 and 3
2 to 0
Bit
15, 14
13
12
11
10 to 0
Bit
15 and 14
13
See
Not supported for the UJA1069TW/3V0 and UJA1069TW/3V3 version.
Not supported for the UJA1069TW/3V0 version.
The Device Identification Control bit is cleared during power-up of the SBC, indicating that General Purpose register 0 is loaded with the
Device Identification Code. Any write access to General Purpose register 0 will set the DIC bit, regardless of the value written to DIC.
During power-up the General Purpose register 0 is loaded with a ‘Device Identification Code’ consisting of the SBC type and SBC
version, and the DIC bit is cleared.
Section
Special Mode register and Special Mode Feedback register bit description
General Purpose register 0 and General Purpose Feedback register 0 bit description
General Purpose register 1 and General Purpose Feedback register 1 bit description
Symbol
V1RTHC[1:0]
-
Symbol
A1, A0
RRS
RO
DIC
GP0[10:0]
Symbol
A1, A0
RRS
6.12.11 General Purpose registers and General Purpose Feedback registers
6.13.1.
The UJA1069 offers two 12-bit General Purpose registers (and accompanying General
Purpose Feedback registers) with no predefined bit definition. These registers can be
used by the microcontroller for advanced system diagnosis or for storing critical system
status information outside the microcontroller. After Power-up General Purpose register 0
will contain a ‘Device Identification Code’ consisting of the SBC type and SBC version.
This code is available until it is overwritten by the microcontroller (as indicated by the DIC
bit).
Description
register address
Read Register Select
Read Only
Device Identification
Control
General Purpose bits
Description
register address
Read Register Select
Description
V1 Reset Threshold
Control
reserved
[1]
Rev. 03 — 10 September 2007
[2]
Value
10
1
0
1
0
1
0
1
0
Value
11
1
0
Value
11
10
01
00
000
Function
read the General Purpose Feedback register 0
read the General Purpose Feedback register 0
read the System Configuration Feedback register
read the register selected by RRS without writing to the
General Purpose register 0
read the register selected by RRS and write to the General
Purpose register 0
General Purpose register 0 contains user-defined bits
General Purpose register 0 contains the Device
Identification Code
user-defined
user-defined
Function
select General Purpose register 1
read the General Purpose Feedback register 1
read the Physical Layer Control Feedback register
Function
V1 reset threshold = 0.9
V1 reset threshold = 0.7
V1 reset threshold = 0.8
V1 reset threshold = 0.9
reserved for future use; should remain cleared to ensure
compatibility with future functions which might use this bit
LIN fail-safe system basis chip
…continued
V
V
V
V
V1(nom)
V1(nom)
V1(nom)
V1(nom)
[2]
[3]
UJA1069
© NXP B.V. 2007. All rights reserved.
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