UJA1069TW24/5V0:51 NXP Semiconductors, UJA1069TW24/5V0:51 Datasheet - Page 18

• Manufacturer Part Number: UJA1069TW24/5V0:51
• Description: IC LIN FAIL-SAFE 24-HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1069TW24/5V0:51

• Applications: Automotive
• Interface: LIN (Local Interconnect Network)
• Voltage - Supply: 5V
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280013518; UJA1069TW24/5V0-T; UJA1069TW24/5V0-T

NXP Semiconductors
UJA1069_3
Product data sheet
6.6.4 Switched battery output V3
6.7.1 Mode control
6.7 LIN transceiver
V3 is a high-side switched BAT42-related output which is used to drive external loads
such as wake-up switches or relays. The features of V3 are as follows:
The integrated LIN transceiver of the UJA1069 is a LIN 2.0 compliant transceiver. The
transceiver has the following features:
The controller of the LIN transceiver provides two modes of operation: Active mode and
Off-line mode; see
current, but wake-up events will be recognized by the separate wake-up receiver.
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Three application controlled modes of operation; ON, OFF or Cyclic mode.
Two different cyclic modes allow the supply of external wake-up switches; these
switches are powered intermittently, thus reducing the system’s power consumption in
case a switch is continuously active; the wake-up input of the SBC is synchronized
with the V3 cycle time.
The switch is protected against current overloads. If V3 is overloaded, pin V3 is
automatically disabled. The corresponding Diagnosis register bit is reset and an
interrupt is forced (if enabled). During Sleep mode, a wake-up is forced and the
corresponding reset source code becomes available in the RSS bits of the System
Status register. This signals that the wake-up source via V3 supplied wake-up
switches has been lost.
SAE J2602 compliant and compatible with LIN revision 1.3
Fail-safe LIN termination to BAT42 via dedicated RTLIN pin
Enhanced error handling and reporting of bus and TXD failures; these failures are
separately identified in the System Diagnosis register
Figure
Rev. 03 — 10 September 2007
9. In Off-line mode the transmitter and receiver do not consume
LIN fail-safe system basis chip
UJA1069
© NXP B.V. 2007. All rights reserved.
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