HCTL-2032 Avago Technologies US Inc., HCTL-2032 Datasheet - Page 21

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HCTL-2032

Manufacturer Part Number
HCTL-2032
Description
IC QUAD DECODER/COUNTER 32DIP
Manufacturer
Avago Technologies US Inc.
Datasheets

Specifications of HCTL-2032

Applications
Encoder to Microprocessor
Interface
8-Bit Tristate
Voltage - Supply
4.5 V ~ 5.5 V
Package / Case
32-DIP (0.600", 15.24mm)
Mounting Type
Through Hole
Current, Supply
1 μA
Function Type
32-Bits
Logic Function
Counter/Decoder
Logic Type
CMOS/LSTLL
Number Of Circuits
Dual
Package Type
PDIP-32
Special Features
Binary, Bus, Schmitt-Trigger, Tri-State
Temperature, Operating, Range
-40 to +100 °C
Voltage, Supply
4.5 to 5.5 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Q2414340

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HCTL-2032
Manufacturer:
AGILENT
Quantity:
5 000
Part Number:
HCTL-2032-SC
Manufacturer:
AVX
Quantity:
24 000
Part Number:
HCTL-2032-SC
Manufacturer:
AGILENT
Quantity:
20 000
Part Number:
HCTL-2032SC
Manufacturer:
AGILENT
Quantity:
20 000
Ordering Information
For product information and a complete list of distributors, please go to our web site:
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries.
Data subject to change. Copyright © 00 Avago Technologies Limited. All rights reserved. Obsoletes 99-000EN
AV0-009EN - January , 00

Actions
1. At first, Port B4, B5, and B6 are setup for 4X encoding
2. The HCTL-2032 detects that OE/ are low on the next
3. SEL1 and SEL2 are setup to select the appropriate
4. Step 3 is repeated by changing the SEL1 and SEL2
5. The HCTL-2032 detects OE/ high on the next falling
6. For displaying purposes, the data is arranged in 32-
HCTL - 20 XX - XX
and X/Y axis selection.
falling edge of the CLK and asserts the internal inhibit
signal. Data can be read without regard for the phase
of the CLK.
bytes. The “Get_hi” subroutine is called and the data is
read into the AVR.
combinations and specific subroutine is called to read
in the appropriate data.
edge of the CLK. The program set OE/ high by writing
the correct value to the respective Port. This causes
the data lines to be tristated. On the next rising CLK
edge new data is transferred from the counter to the
position data latch.
bit data by shifting the MSB to the left through
multiplication.
32
32
32
22
Blank
SC
SCT
Blank
32-PDIP Package
32-SOIC Package
32-SOIC Package in Tape and Reel (1000 Pcs / Reel)
20-PDIP Package
www.avagotech.com

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