DS33X41+ Maxim Integrated Products, DS33X41+ Datasheet - Page 96
![IC MAPPING ETHERNET 256CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS33X41+
Manufacturer Part Number
DS33X41+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33X11.pdf
(375 pages)
Specifications of DS33X41+
Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8.20.5 HDLC Encoding and Decoding
The HDLC protocol provides a simple method for encapsulating Ethernet Frames over point-to-point serial links.
HDLC Encapsulation can be bit or byte synchronous. In byte synchronous mode, byte stuffing is performed. Byte
stuffing consists of detecting bytes that mimic flag and escape sequence bytes (7Eh and 7Dh), and replacing them
with an escape sequence (7Dh) followed by the byte ‘exclusive-OR’ed’ with 20h. In Bit Synchronous HDLC, 5
consecutive ones must always be followed by a 0 to avoid mimicking a start or stop flag. Note that the 5
consecutive ones can straddle any 2 consecutive bytes. HDLC frame Encapsulation of the frame is shown in
Figure 8-21.
A Line Header Insertion function (in PP.ELHHR and PP.ELHLR) allows the user to insert Address, Control, and
Protocol bytes. The Tag 1 Insertion function (in PP.ET1DHR and PP.ET1DLR) allows the user to insert a 4-byte
MPLS tag immediately before the Destination Address (DA). The Tag 2 Insertion function (in PP.ET2DHR and
PP.ET2DLR) allows the user to insert a 4-byte VLAN tag immediately after the Source Address (SA). Any existing
VLAN tags are “pushed” lower in the frame.
The device provides the following HDLC functions.
HDLC Receive Compatibility:
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
•
•
•
•
•
•
•
•
•
•
•
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Insertion of HDLC flags
Performs HDLC bit and byte stuffing
Insertion of Payload FCS (32 bit / 16 bit)
Selectable X
Selectable Idle: All Ones or Flag insertion
HDLC with no line headers and encapsulated Ethernet Frames.
HDLC with LAPS Headers.
HDLC with Cisco HDLC Headers.
HDLC Encapsulated Ethernet Frames with VLAN Tags .
HDLC Encapsulated Ethernet Frames with MPLS Headers.
Bit or Byte Synchronous Stuffed HDLC
HDLC FCS lengths of 0, 16, or 32 bits.
Interframe fill can be 7Eh or all 1s.
X
43
+1 scrambled frame.
43
+1 scrambling
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