DS33X41+ Maxim Integrated Products, DS33X41+ Datasheet - Page 184
![IC MAPPING ETHERNET 256CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS33X41+
Manufacturer Part Number
DS33X41+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33X11.pdf
(375 pages)
Specifications of DS33X41+
Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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0DDh:
Default
Register Name:
Register Description:
Register Address:
0DCh:
Default
LAN 2 Policing Parameters. This register determines the Policing function setting for Ethernet port 2. The Policing
function is used to control the rate at which frames are forwarded to Serial Interfaces. The Policing function can be
configured to send Explicit Back Pressure Flow Control to the Ethernet Sending equipment (Ethernet Pause
Control) or can be used to enable a frame discarding mechanism that restrict the rate at which frame are accepted.
Bit 15: Committed Burst Size Selection (CBSS) This bit function is not available in device revision A1
(GL.IDR.REVn=000).
Bits 10-11: LAN 2 Policing Mode (L2PM[2:1])
Bits 8-9: LAN 2 Policing Credit Range (L2PCR[2:1])
Bits 0-7: LAN 2 Policing Credit Threshold (L2PCT[8:1]). This register specifies the Credit Threshold setting of
the Policing function. Only values between 8 to 255 are supported.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = Default condition. CBS is 4096 bytes.
1 = CBS is 12288 bytes. Only valid in Policing Discard mode.
00 = Policing Disabled
01 = Policing Pause Enabled
10 = Policing Discard Enabled
11 = Reserved
00 = Low Credit Range for CIR = 64kbps to 2Mbps
01 = Mid Credit Range for CIR = 2Mbps to 16Mbps
10 = High Credit Range for CIR = 16Mbps to 416Mbps
11 = Reserved
L2PCT8
Bit 15
CBSS
Bit 7
0
0
L2PCT7
Bit 14
Bit 6
0
0
-
SU.L2PP
LAN 2 Policing Parameters
0DCh
L2PCT6
Bit 13
Bit 5
0
0
-
L2PCT5
Bit 12
Bit 4
0
0
-
L2PCT4
L2PM2
Bit 11
Bit 3
0
0
L2PCT3
L2PM1
Bit 10
Bit 2
0
0
L2PCR2
L2PCT2
Bit 9
Bit 1
0
0
L2PCR1
L2PCT1
184 of 375
Bit 8
Bit 0
0
0
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