DS33X41+ Maxim Integrated Products, DS33X41+ Datasheet - Page 279
![IC MAPPING ETHERNET 256CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS33X41+
Manufacturer Part Number
DS33X41+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33X11.pdf
(375 pages)
Specifications of DS33X41+
Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
0010h:
Default
0011h:
Default
0012h:
Default
0013h:
Default
Bits 10-15: PHY Physical Layer Address (PPA[4:0]) - Contains the address of the PHY to be accessed.
Bits 6-9: PHY MDIO Register (GM[4:0]) - Contains the address of register within the PHY to be accessed.
Bits 2-3: Clock Range (CR[1:0]) - Selects MDC clock frequency.
00 = divide input clock by 42
01 = divide input clock by 62
10 = divide input clock by 16
11 = divide input clock by 26
Bit 1: PHY MDIO Write (GW) - When set to 1, a write operation will be performed. When equal to zero, a read
operation will be performed.
Bit 0: PHY GMII Busy (GB) - This bit should be set to 1 when writing to SU.GMIIA. The MAC will clear the bit
when it is no longer busy. Do not write to GMIIA or GMIID while this bit is still set to 1. During read operations,
the data in SU.GMIID is invalid until this bit is equal to 0.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Reserved
Reserved
PPA[4]
GM[1]
Bit 31
Bit 23
Bit 15
Bit 7
0
0
0
0
Reserved
Reserved
GM[0]
PPA[3]
Bit 30
Bit 22
Bit 14
Bit 6
0
0
0
0
SU.GMIIA
MAC MDIO Management Address Register
0010h (indirect)
Reserved
Reserved
Reserved
PPA[2]
Bit 29
Bit 21
Bit 13
Bit 5
0
0
0
0
Reserved
Reserved
Reserved
PPA[1]
Bit 28
Bit 20
Bit 12
Bit 4
0
0
0
0
Reserved
Reserved
PPA[0]
Bit 27
Bit 19
Bit 11
CR[1]
Bit 3
0
0
0
0
Reserved
Reserved
GM[4]
Bit 10
CR[0]
Bit 26
Bit 18
Bit 2
0
0
0
0
Reserved
Reserved
GM[3]
Bit 25
Bit 17
Bit 9
Bit 1
GW
0
0
0
0
Reserved
Reserved
279 of 375
GM[2]
Bit 24
Bit 16
Bit 0
Bit 8
GB
0
0
0
0
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