DS33ZH11+ Maxim Integrated Products, DS33ZH11+ Datasheet - Page 52

• Manufacturer Part Number: DS33ZH11+
• Description: IC MAPPER ETHERNET 100CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33ZH11+

• Applications: Data Transport
• Interface: Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 100-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS33Z11 Ethernet Mapper
Figure 8-10 Repetitive Pattern Synchronization State Diagram
Sync
1 bit error
Verify
Match
Pattern Matches
8.15.3 Pattern Monitoring
Pattern monitoring monitors the incoming data stream for Out Of Synchronization (OOS) condition, bit errors, and
counts the incoming bits. An OOS condition is declared when the synchronization state machine is not in the
“Sync” state. An OOS condition is terminated when the synchronization state machine is in the “Sync” state.
Bit errors are determined by comparing the incoming data stream bit to the receive pattern generator output. If
they do not match, a bit error is declared, and the bit error and bit counts are incremented. If they match, only the
bit count is incremented. The bit count and bit error count are not incremented when an OOS condition exists.
8.15.4 Pattern Generation
Pattern Generation generates the outgoing test pattern, and passes it onto Error Insertion. The transmit pattern
generator is a 32-bit shift register that shifts data from the least significant bit (LSB) or bit 1 to the most significant
n
y
bit (MSB) or bit 32. The input to bit 1 is the feedback. For a PRBS pattern (generating polynomial x
+ x
+ 1), the
feedback is an XOR of bit n and bit y. For a repetitive pattern (length n), the feedback is bit n. The values for n
and y are individually programmable. The output of the receive pattern generator is the feedback. If QRSS is
enabled, the feedback is an XOR of bits 17 and 20, and the output is forced to one if the next 14 bits are all zeros.
QRSS is programmable (on or off). For PRBS and QRSS patterns, the feedback is forced to one if bits 1 through
31 are all zeros. When a new pattern is loaded, the pattern generator is loaded with a pattern value before pattern
n
generation starts. The pattern value is programmable (0 – 2
- 1). When PRBS and QRSS patterns are generated
the seed value is all ones.
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