MT46V32M16P-5B:J Micron Technology Inc, MT46V32M16P-5B:J Datasheet - Page 59

• Manufacturer Part Number: MT46V32M16P-5B:J
• Description: IC SDRAM 512MB 200MHZ 66TSOP
• Manufacturer: Micron Technology Inc
• Series: -r

Specifications of MT46V32M16P-5B:J

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP (0.400", 10.16mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

CAS Latency (CL)
Figure 25:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. O; Core DDR Rev. D 2/11 EN
CAS Latency
Note:
The CL is the delay, in clock cycles, between the registration of a READ command and
the availability of the first bit of output data. The latency can be set to 2, 2.5, or 3 (-5B
only) clocks, as shown in Figure 25. Reserved states should not be used, as unknown
operation or incompatibility with future versions may result.
If a READ command is registered at clock edge n, and the latency is m clocks, the data
will be available nominally coincident with clock edge n + m. Table 37 on page 60 indi-
cates the operating frequencies at which each CL setting can be used.
Command
Command
Command
BL = 4 in the cases shown; shown with nominal
DQS
DQS
DQS
CK#
CK#
CK#
DQ
DQ
DQ
CK
CK
CK
READ
READ
READ
T0
T0
T0
CL = 2
CL = 3
CL = 2.5
NOP
NOP
NOP
T1
T1
T1
59
Transitioning Data
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
NOP
NOP
T2
T2
T2
512Mb: x4, x8, x16 DDR SDRAM
T2n
T2n
t
AC,
t
DQSCK, and
NOP
NOP
NOP
T3
T3
T3
Don’t Care
T3n
T3n
T3n
©2000 Micron Technology, Inc. All rights reserved.
t
DQSQ.
Operations