CC-9P-V526UJ-S Digi International, CC-9P-V526UJ-S Datasheet - Page 26

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CC-9P-V526UJ-S

Manufacturer Part Number
CC-9P-V526UJ-S
Description
MOD 9P 32MB SDRAM 8MB FLASH
Manufacturer
Digi International
Series
-r
Datasheet

Specifications of CC-9P-V526UJ-S

Module/board Type
Core Module
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Networking
www.digiembedded.com
C o n f i g u r a t i o n p i n s — C P U
Default module
CPU
configuration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
C h a p t e r 1
These can be used to drive LEDs.
None of the 64 GPIO pins on connector X2 disturb CPU boot strap functions. The
boot strap functions are controlled by address signals; the user can not disturb boot
strap functions from outside, if the module configuration signals, described below,
are correctly configured.
The user has access to six configuration signals:
LITTLE#/BIG_ ENDIAN which allows the user to select the endianess of the
module
OCD_EN# which allows the user to activate on-chip debugging
SW_CONF [3:0] which are reserved for the user; the user software can read out
these signals through the GEN ID register
X2-18: Cellular signal strength (3rd bar).
(@ 0xA090_0210).
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