W83977G-A Nuvoton Technology Corporation of America, W83977G-A Datasheet - Page 46

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W83977G-A

Manufacturer Part Number
W83977G-A
Description
IC I/O CONTROLLER 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83977G-A

Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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5.2.9
This register is used to control the data rate. In the PC/AT and PS/2 mode, the bit definitions are as
follows:
Bit 7-2: Reserved. These bits should be set to 0.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
In the PS/2 Model 30 mode, the bit definitions are as follows:
Bit 7-3: Reserved. These bits should be set to 0.
NOPREC (Bit 2):
This bit indicates no precompensation. It has no function and can be set by software.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
Configuration Control Register (CC Register) (Write base address + 7)
X: Reserved
x
7
X
X
7
:
Reserved
x
6
X
6
x
5
5
X
x
X
4
4
X
3
x
3
-38
2
x
2
1
1
0
0
DRATE0
DRATE1
NOPREC
DRATE0
DRATE1

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