W83977G-A Nuvoton Technology Corporation of America, W83977G-A Datasheet - Page 4

• Manufacturer Part Number: W83977G-A
• Description: IC I/O CONTROLLER 128-PQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83977G-A

• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7. INFRARED (IR) PORT..................................................................................................................... 48
7.1
7.2
7.3
7.4
7.5
7.6
7.7
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
IR Register Description ......................................................................................................... 48
Set0-Legacy/Advanced IR Control and Status Registers..................................................... 49
Set1 - Legacy Baud Rate Divisor Register ........................................................................... 59
Set2 - Interrupt Status or IR FIFO Control Register (ISR/UFR)............................................ 59
Set3 - Version ID and Mapped Control Registers................................................................. 63
Set4 - TX/RX/Timer counter registers and IR control registers. ........................................... 64
Set 5 - Flow control and IR control and Frame Status FIFO registers.................................. 66
6.2.6
6.2.7
6.2.8
6.2.9
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
7.3.1
7.3.2
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.5.1
7.5.2
7.5.3
7.5.4
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.7.1
7.7.2
7.7.3
7.7.4
7.7.5
Interrupt Status Register (ISR) (Read only) ............................................................................45
Interrupt Control Register (ICR) (Read/Write).........................................................................46
Programmable Baud Generator (BLL/BHL) (Read/Write).......................................................46
User-defined Register (UDR) (Read/Write) ............................................................................47
Set0.Reg0 - Receiver/Transmitter Buffer Registers (RBR/TBR) (Read/Write) .......................49
Set0.Reg1 - Interrupt Control Register (ICR)..........................................................................50
Set0.Reg2 - Interrupt Status Register/IR FIFO Control Register (ISR/UFR) ..........................51
Set0.Reg3 - IR Control Register/Set Select Register (UCR/SSR): .........................................55
Set0.Reg4 - Handshake Control Register (HCR) ...................................................................55
Set0.Reg5 - IR Status Register (USR) ...................................................................................57
Set0.Reg6 - Reserved ............................................................................................................57
Set0.Reg7 - User Defined Register (UDR/AUDR) ..................................................................57
Set1.Reg0~1 - Baud Rate Divisor Latch (BLL/BHL) ...............................................................59
Set1.Reg 2~7 .........................................................................................................................59
Reg0, 1 - Advanced Baud Rate Divisor Latch (ABLL/ABHL) ..................................................60
Reg2 - Advanced IR Control Register 1 (ADCR1) ..................................................................60
Reg3 - Sets Select Register (SSR).........................................................................................61
Reg4 - Advanced IR Control Register 2 (ADCR2) ..................................................................61
Reg6 - Transmitter FIFO Depth (TXFDTH) (Read Only) ........................................................63
Reg7 - Receiver FIFO Depth (RXFDTH) (Read Only)............................................................63
Reg0 - Advanced IR ID (AUID)...............................................................................................63
Reg1 - Mapped IR Control Register (MP_UCR) .....................................................................64
Reg2 - Mapped IR FIFO Control Register (MP_UFR) ............................................................64
Reg3 - Sets Select Register (SSR).........................................................................................64
Set4.Reg0, 1 - Timer Value Register (TMRL/TMRH) .............................................................64
Set4.Reg2 - Infrared Mode Select (IR_MSL) ..........................................................................65
Set4.Reg3 - Set Select Register (SSR) ..................................................................................65
Set4.Reg4, 5 - Transmitter Frame Length (TFRLL/TFRLH) ...................................................65
Set4.Reg6, 7 - Receiver Frame Length (RFRLL/RFRLH) ......................................................66
Set5.Reg0, 1 - Flow Control Baud Rate Divisor Latch Register (FCDLL/ FCDHL) .................66
Set5.Reg2 - Flow Control Mode Operation (FC_MD) .............................................................67
Set5.Reg3 - Sets Select Register (SSR) ................................................................................68
Set5.Reg4 - Infrared Configure Register 1 (IRCFG1).............................................................68
Set5.Reg5 - Frame Status FIFO Register (FS_FO) ...............................................................69
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Publication Release Date: May 2006
Revision 0.60