W83977G-A Nuvoton Technology Corporation of America, W83977G-A Datasheet - Page 111

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W83977G-A

Manufacturer Part Number
W83977G-A
Description
IC I/O CONTROLLER 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83977G-A

Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
9.7
Registers
9.7.1
On-Now”” Register 1 (Bank2 Register 49h)
BIT
7
6
5
4
3
2
1
0
NAME
PF
CLPOST
SPOFC
DPSCA
CLRSMI
SMIMD
PHRIDM
DPODTM
PF (Power Failure)
The PF is set when a power-failure occurs. This bit is cleared by writing a "1" to it.
CLPOST (Clear Panel-switch-off-Save Timer)
This bit is self-cleared after writing an "1" to it. If it is set, Panel-switch-off-Save timer is stopped and
cleared.
SPOFC (Software Power-Off Command)
This bit is self-cleared after writing an "1" to it. If it is set, the PSCTRL goes inactive immediately.
DPSCA (Disable Power Supply Control Activation)
This bit is set as long as PF is set. When set, it disables all PSCTRL activation events except Panel-
Switch- On event.
CLSMI (Clear SMI )
This bit is self-cleared after writing an "1" to it. If it is set, SMI is cleared to its inactive state. This bit
is used to clear SMI when SMIMD is set.
SMIMD ( SMI Mode)
If it is set, SMI is level-sensitive. Once SMI goes active, it keeps active until CLSMI is set.
Writing a "0" to this bit sets SMI to be edge-triggered.
PHRIDM ( PHRI Detection Mode)
A "1" on this bit sets PHRI detection mode to be on falling edge.
A "0" on this bit sets PHRI detection mode to be on a pulse train of frequency greater than 11Hz and
lasts for 0.2 second.
DPODTM (Disable Power Off Delay Timer )
If set, Panel Switch Power-Off Delay Timer is stopped.
If reset, Panel Switch Power-Off Delay Timer counts down continuously.
Publication Release Date: May 2006
-103 -
Revision 0.60

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