AD9995KCP Analog Devices Inc, AD9995KCP Datasheet - Page 26

IC CCD SIGNAL PROCESSOR 56-LFCSP

AD9995KCP

Manufacturer Part Number
AD9995KCP
Description
IC CCD SIGNAL PROCESSOR 56-LFCSP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 12-Bitr
Datasheet

Specifications of AD9995KCP

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Current - Supply
30mA
Mounting Type
Surface Mount
Package / Case
56-LFCSP
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Input Voltage Range
0.5V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Resolution
12b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
56
Package Type
LFCSP EP
Number Of Channels
1
Lead Free Status / RoHS Status
Not Compliant

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SHUTTER TIMING CONTROL
The CCD image exposure time is controlled by the substrate
clock signal (SUBCK), which pulses the CCD substrate to clear
out accumulated charge. The AD9995 supports three types of
electronic shuttering: normal shutter, high precision shutter,
and low speed shutter. Along with the SUBCK pulse placement,
the AD9995 can accommodate different readout configurations
to further suppress the SUBCK pulses during multiple field
readouts. The AD9995 also provides programmable outputs to
control an external mechanical shutter (MSHUT), strobe/flash
(STROBE), and the CCD bias select signal (VSUB).
Normal Shutter Operation
By default, the AD9995 is always operating in the normal shutter
configuration in which the SUBCK signal is pulsing in every VD
field (see Figure 26). The SUBCK pulse occurs once per line,
and the total number of repetitions within the field will determine
the length of the exposure time. The SUBCK pulse polarity
and toggle positions within a line are programmable using the
SUBCKPOL and SUBCK1TOG registers (see Table XI).
The number of SUBCK pulses per field is programmed in the
SUBCKNUM register (Addr. 0x63).
As shown in Figure 26, the SUBCK pulses will always begin
in the line following the SG active line, which is specified in
the SGACTLINE registers for each field. The SUBCKPOL,
SUBCK1TOG, SUBCK2TOG, SUBCKNUM, and SUBCK-
SUPPRESS registers are updated at the start of the line after
the sensor gate line, as described in the Updating New Register
Values section.
AD9995
SUBCK
SUBCK
VSG
VSG
VD
HD
HD
VD
NOTES
1. SECOND SUBCK PULSE IS ADDED IN THE LAST SUBCK LINE.
2. LOCATION OF 2ND PULSE IS FULLY PROGRAMMABLE USING THE SUBCK2 TOGGLE POSITION REGISTER.
SUBCK PROGRAMMABLE SETTINGS:
1. PULSE POLARITY USING THE SUBCKPOL REGISTER.
2. NUMBER OF PULSES WITHIN THE FIELD USING THE SUBCKNUM REGISTER (SUBCKNUM = 3 IN THE ABOVE FIGURE).
3. PIXEL LOCATION OF PULSE WITHIN THE LINE AND PULSEWIDTH PROGRAMMED USING SUBCK1 TOGGLE POSITION REGISTER.
Figure 27. High Precision Shutter Mode
Figure 26. Normal Shutter Mode
t
EXP
–26–
t
EXP
High Precision Shutter Operation
High precision shuttering is used in the same manner as nor-
mal shuttering, but uses an additional register to control the
very last SUBCK pulse. In this mode, the SUBCK still pulses
once per line, but the last SUBCK in the field will have an
additional SUBCK pulse whose location is determined by the
SUBCK2TOG register, as shown in Figure 27. Finer resolution
of the exposure time is possible using this mode. Leaving the
SUBCK2TOG register set to max value (0xFFFFFF) will disable
the last SUBCK pulse (default setting).
Low Speed Shutter Operation
Normal and high precision shutter operations are used when
the exposure time is less than one field long. For long exposure
times greater than one field interval, low speed shutter opera-
tion is used. The AD9995 uses a separate exposure counter to
achieve long exposure times. The number of fields for the low
speed shutter operation is specified in the EXPOSURE register
(Addr. 0x62). As shown in Figure 28, this shutter mode will
suppress the SUBCK and VSG outputs for up to 4095 fields
(VD periods). The VD and HD outputs may be suppressed
during the exposure period by programming the VDHDOFF
register to 1.
To generate a low speed shutter operation, it is necessary to trig-
ger the start of the long exposure by writing to the TRIGGER
register bit D3. When this bit is set high, the AD9995 will begin
an exposure operation at the next VD edge. If a value greater than
zero is specified in the EXPOSURE register, the AD9995 will
suppress the SUBCK output on subsequent fields.
t
EXP
t
EXP
REV. 0

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