DS1877T+T&R Maxim Integrated Products, DS1877T+T&R Datasheet - Page 60

• Manufacturer Part Number: DS1877T+T&R
• Description: IC CTLR/MON SFP 1-2CH 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1877T+T&R

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 2.5mA
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1877T+TRL

SFP Controller for Dual Rx Interface
Table 02h, Register C7h: TBLSELPON
Table 02h, Register C8h–C9h: DAC2 VALUE
Table 02h, Register CAh–CBh: RESERVED
60
C8h
C9h
C7h
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
The digital value used for DAC2 VALUE. It is the result of LUT4 plus DAC2 OFFSET times 4 recalled from
Address B0h, Table 04h (Registers F8h–FFh) at the adjusted memory address found in TINDEX. This register is
updated at the end of the temperature conversion.
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
Chooses the initial value for the TBL SEL byte (Lower Memory, Register 7Fh) at power-on.
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
These registers do not exist.
BIT 7
BIT 7
2
2
0
7
7
2
2
0
6
6
V
DAC2
V
0000h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
(PW2 and DAC2EN = 0) or (PW1 and RWTBL2 and DAC2EN = 0)
Common A2h and B2h memory locations
Volatile
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory locations
Nonvolatile (SEE)
00h
N/A
N/A
N/A
None
DAC2
=
2
2
V
0
DAC2 VALUE = LUT4 + DAC2 OFFSET x 4
5
5
REFIN
=
V
1024
REFIN
−
V
1024
REFIN
×
2
2
0
DAC2 VALUE
4
4
×
DAC VALUE
2
0
2
3
d
3
(if POLARITY = 0)
d
(if POLARITY = 1)
2
2
0
2
2
2
2
2
9
1
1
BIT 0
BIT 0
2
2
2
8
0
0