DS1877T+T&R Maxim Integrated Products, DS1877T+T&R Datasheet - Page 18

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DS1877T+T&R

Manufacturer Part Number
DS1877T+T&R
Description
IC CTLR/MON SFP 1-2CH 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP+ Controllerr
Datasheet

Specifications of DS1877T+T&R

Input Type
Logic
Output Type
Logic
Interface
I²C
Current - Supply
2.5mA
Mounting Type
Surface Mount
Package / Case
28-WFQFN exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
90-1877T+TRL
Any time V
used to determine if V
accomplished by checking the RDYB bit in the STATUS
byte (Lower Memory, Register 6Eh). RDYB is set when
V
is timed (within 500Fs) to go to 0, at which point the part
is fully functional.
For all device addresses sourced from EEPROM
(Table 02h, Register 8Bh), the default device address
is A2h until V
address to be recalled from the EEPROM.
The device’s delta-sigma outputs are 10 bits. For illustra-
tive purposes, a 3-bit example is provided in Figure 8.
Figure 8. Recommended RC Filter for DAC Outputs
Figure 9. 3-Bit (8-Position) Delta-Sigma Example
SFP Controller for Dual Rx Interface
18
CC
is below POA; when V
DS1877
DS1877
O
1
2
3
4
5
6
7
DAC
DAC
CC
CC
is above POD, the I
3.24k Ω
1k Ω
exceeds POA, allowing the device
CC
0.01µF
0.1µF
is below the POA level. This is
3.24k Ω
1k Ω
CC
Delta-Sigma Outputs
rises above POA, RDYB
0.01µF
0.1µF
2
C interface can be
VOLTAGE OUTPUT
2kΩ
CURRENT SINK
Each possible output of this 3-bit delta-sigma DAC is
provided in Figure 9.
In LUT mode the DACs are each controlled by an LUT
with high-temperature resolution and an OFFSET LUT
with lower temperature resolution. The high-resolution
LUTs each have 2NC resolutions. The OFFSET LUTs are
located in the upper eight registers (F8h–FFh, Table 04h)
of the table containing each high-resolution LUT. The
DAC values are determined as follows:
An example calculation for DAC1 is as follows:
Assumptions:
1) Temperature is +43NC
2) Table 04h (DAC OFFSET LUT), Register FCh = 2Ah
3) Table 04h (DAC LUT), Register AAh = 7Bh
Because the temperature is +43NC, the DAC LUT index
is AAh and the DAC1 OFFSET LUT index is FCh.
When temperature controlled, the DACs are updated
after each temperature conversion. See Figure 10.
The reference input, REFIN, is the supply voltage for the
output buffer of all the DACs. The voltage connected to
REFIN must be able to support the edge rate require-
ments of the delta-sigma outputs. In a typical applica-
tion, a 0.1FF capacitor should be connected between
REFIN and ground.
DAC value = DAC LUT + 4 x (DAC OFFSET LUT)
DAC1 = 7Bh + 4 x 2Ah = 123h = 291

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