AMIS49587C5871RG ON Semiconductor, AMIS49587C5871RG Datasheet - Page 12

• Manufacturer Part Number: AMIS49587C5871RG
• Description: IC MODEM PLC 50/60MHZ 28PLCC
• Manufacturer: ON Semiconductor

Specifications of AMIS49587C5871RG

• Baud Rates: Selectable
• Interface: SCI
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 28-PLCC
• Number Of Transmitters: 1
• Power Supply Requirement: Single
• Package Type: PLCC
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 28
• Operating Temperature (max): 70C
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Lead Free Status / Rohs Status: Compliant

FROM Line Coupler
TO Power Amplifier
FUNCTIONAL DESCRIPTION
units of the AMIS−49587:
Transmitter
the communication signal which will be sent on the
transmitting channel during the transmitting phase. This
block is connected to a power amplifier which injects the
output signal on the mains through a coupler.
Receiver
pass filtered in order to avoid aliasing during the conversion.
Then the level of the signal is automatically adapted by an
automatic gain control (AGC) block. This operation
maximizes the dynamic range of the incoming signal. The
signal is then converted to its digital representation using
sigma delta modulation. From then on, the processing of the
data is done in a digital way. By using dedicated hardware,
a direct quadrature demodulation is performed. The signal
demodulated in the base band is then low pass filtered to
reduce the noise and reject the image spectrum.
Clock and Control
transmitted at the zero crossing of the mains voltage. In
order to recover the information at the zero crossing, a zero
crossing detection of the mains is performed. A
phase−locked loop (PLL) structure is used in order to allow
a more reliable reconstruction of the synchronization. This
PLL permits as well a safer implementation of the
”repetition with credit” function (also known as chorus
transmission). The clock generator makes use of a precise
quartz oscillator master. The clock signals are then obtained
by the use of a programmed division scheme. The support
The block diagram below represents the main functional
The AMIS−49587 Transmitting function block prepares
The analog signal coming from the line−coupler is low
According to the IEC standard, the frame data is
REF_OUT
M50Hz_IN
RX_OUT
TX_ENB
TX_OUT
ALC_IN
RX_IN
AMIS− 49587
Transmitter (S− FSK Modulator)
Receiver (S− FSK Demodulator)
Clock and Control
crossing
Zero
AAF
VddA
Figure 4. S−FSK Modem AMIS−49587 Block Diagram
VssA
Filter
AGC
PLL
LP
VddD
REF
D/A
A/D
Clock Generator
VssD
& Timer
http://onsemi.com
S− FSK Demodulator
& Sine Synthesizer
Transmit Data
TX_DATA
12
XIN XOUT
OSC
circuits are also contained in this block. The support circuits
include the necessary blocks to supply the references
voltages for the AD and DA converters, the biasing currents
and power supply sense cells to generate the right power off
and startup conditions.
Communication Controller
micro−processor, its peripherals: RAM, ROM, UART,
TIMER, and the Power on reset. The processor uses the
ARM Reduced Instruction Set Computer (RISC)
architecture optimized for IO handling. For most of the
instructions, the machine is able to perform one instruction
per clock cycle. The microcontroller contains the necessary
hardware to implement interrupt mechanisms, timers and is
able to perform byte multiplication over one instruction
cycle. The microcontroller is programmed to handle the
physical layer (chip synchronization), and the MAC layer
conform to IEC 1334−5−1. The program is stored in a
Figure 5. Data Stream is in Sync with Zero Crossings
The Communication Controller block includes the
Communication Controller
Data
RAM
16− bit
ARM
Risc
Core
20 ms
Program
ROM
of the Mains
Timer 1 & 2
Watchdog
Interface
I/O ports
Interrupt
Comm.
Control
Control
Serial
POR
Test
24 bit @ 1200 baud
JTAG I /F
TEST
RESB
TxD
RxD
BR1
BR2
IO[0:2]
TO Application
Micro Controller