LH79525N0Q100A1 NXP Semiconductors, LH79525N0Q100A1 Datasheet - Page 32
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LH79525N0Q100A1
Manufacturer Part Number
LH79525N0Q100A1
Description
Microcontrollers (MCU) LCD USB ETH'NET MMU
Manufacturer
NXP Semiconductors
Datasheet
1.LH79525N0Q100A1.pdf
(64 pages)
Specifications of LH79525N0Q100A1
Data Bus Width
32 bit
Program Memory Type
ROMLess
Data Ram Size
16 KB
Interface Type
I2C, I2S, IrDA, SSP, UART, USB
Maximum Clock Frequency
76.205 MHz
Number Of Programmable I/os
86
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / Rohs Status
Details
Other names
LH79525N0Q100A1;55
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LH79525N0Q100A1
Manufacturer:
FREESCALE
Quantity:
101
Company:
Part Number:
LH79525N0Q100A1,55
Manufacturer:
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Quantity:
10 000
LH79524/LH79525
Analog-To-Digital Converter
Electrical Characteristics
See Figure 10 for the ADC transfer characteristics.
NOTES:
1. The analog section of the ADC takes 16 × A2DCLK cycles per conversion plus 1 × A2DCLK cycles to be made available in the PCLK
2. The internal voltage reference is driven to nominal value VREF = 2.0 V. Using the Reference Multiplexer, alternative low impedance
3. The analog input pins can be driven anywhere between the power supply rails. If the voltage at the input to the ADC exceeds VREF+
4. Bandgap and other low-bandwidth circuitry operating. All other ADC blocks shut down.
32
A/D Resolution
Throughput Conversion
Acquisition Time
Data Format
CLK Frequency
Differential Non-Linearity
Integral Non-Linearity
Offset Error
Gain Error
Reference Voltage Output
VREF-
VREF+
Crosstalk between channels
Analog Input Voltage Range
Analog Input Current
Reference Input Current
Analog input capacitance
Operating Supply Voltage
Operating Current, VDDA0
Powerdown Current, VDDA0
Standby Current
Brown Out Trip Point (falling point)
Brown Out Hysterisis
Operating Temperature
Table 15 shows the ADC electrical characteristics.
domain. An additional 3 × PCLK cycles are required before being available on the APB.
(RS < 500) voltages can be selected as reference voltages. The range of voltages allowed are specified above. However, the on-chip
reference cannot drive the ADC unless the reference buffer is switched on.
or is below VREF-, the A/D result will saturate appropriately at positive or negative full scale. Trying to pull the analog input pins above
or below the power supply rails will cause protection diodes to be forward-biased, resulting in large current source/sink and possible
damage to the ADC.
PARAMETER
Table 15. ADC Electrical Characteristics
(VREF-) +1.0 V
VSSA
-0.99
MIN.
1.85
2.36
-3.0
-2.0
500
-10
-40
3.0
10
17
NXP Semiconductors
3
0
Rev. 01 — 16 July 2007
binary
VSSA
VREF
TYP.
2.63
590
180
120
-60
2.0
1
(VREF+) -1.0 V
VDDA
VDDA
MAX.
5,000
1000
+3.0
+2.0
2.15
+10
300
3.0
3.6
2.9
10
15
10
85
5
5
CLK Cycles
CLK Cycles
UNITS
LSB
LSB
LSB
Bits
mV
mV
dB
µA
µA
pF
µA
µA
µA
ns
°C
V
V
V
V
V
V
Preliminary data sheet
NOTES
System-on-Chip
1
2
2
3
4