LH79525N0Q100A1 NXP Semiconductors, LH79525N0Q100A1 Datasheet - Page 24
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LH79525N0Q100A1
Manufacturer Part Number
LH79525N0Q100A1
Description
Microcontrollers (MCU) LCD USB ETH'NET MMU
Manufacturer
NXP Semiconductors
Datasheet
1.LH79525N0Q100A1.pdf
(64 pages)
Specifications of LH79525N0Q100A1
Data Bus Width
32 bit
Program Memory Type
ROMLess
Data Ram Size
16 KB
Interface Type
I2C, I2S, IrDA, SSP, UART, USB
Maximum Clock Frequency
76.205 MHz
Number Of Programmable I/os
86
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / Rohs Status
Details
Other names
LH79525N0Q100A1;55
Available stocks
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Manufacturer
Quantity
Price
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LH79524/LH79525
Reset, Clock, and Power Controller
(RCPC)
the operation of the LH79524/LH79525 and provides for
an orderly start-up after power-on and during a wake-up
from one of the power saving operating modes. The
RCPC allows the software to individually select the fre-
quency of the various on-chip clock signals as required
to operate the chip in the most power-efficient mode.
The maximum speeds of the various clocks in the SoC
are shown in Table 11. More detailed descriptions of
each clock appear in the User’s Guide.
• 10 - 20 MHz crystal oscillator and PLL for on-chip
• External Clock input if on-chip oscillator and PLL are
• 32.768 kHz crystal oscillator generating 1 Hz clock
• Individually controlled clocks for peripherals and CPU
• Programmable clock prescalers for UARTs and PWMs
• Five global power control modes are available:
• CPU/Bus clock frequency can be changed on the fly
• Selectable clock output
• Hardware reset (nRESETIN) and software reset.
24
Clock generation (11.2896 MHz recommended)
not used
for Real Time Clock
The RCPC generates the various clock signals for
The RCPC features:
– Active
– Standby
– Sleep
– Stop1
– Stop2
CHANNEL
Table 10. Interrupt Channels (Cont’d)
18
19
20
21
22
23
24
25
26
27
28
29
30
31
ADC Pen IRQ
CLCD Combined Interrupt
DMA Stream 0
DMA Stream 1
DMA Stream 2
DMA Stream 3
SSP I
Ethernet Interrupt
USB Interrupt
UART 0 Interrupt
UART 1 Interrupt
UART 2 Interrupt
USB DMA Interrupt
I
2
C Interrupt
2
S Interrupt
INTERRUPT SOURCE
NXP Semiconductors
Rev. 01 — 16 July 2007
Table 12. Clock Activity for Different Power Modes
Real Time Clock
counter. An interrupt is generated following counting a
programmed number of one-second periods. The 1 Hz
RTC clock is internally derived. The RTC features:
• 32-bit up counter with programmable load
• Programmable 32-bit match compare register
• Software maskable interrupt when counter and com-
• PLL clock
• 32.768 kHz clock
• 1 Hz clock (default).
RTC 32 kHz
Oscillator
10 - 20 MHz
Oscillator
PLL
Peripheral
Clock
CPU Clock
Oscillator Clock (CLK OSC)
PLL System Clock (CLK PLL)
PLL USB Clock
32.768 kHz Oscillator Clock
AHB Clock (HCLK)
AHB Fast CPU Clock (FCLK CPU)
Ethernet Clock
DMA Clock
External Memory Controller Clock
SSP Clock
CLCD Clock
UART[2:0] Clock
RTC Clock
pare registers are identical.
The RTC provides an alarm or long time base
RTC input clock sources:
DEVICE
Table 11. Maximum Clock Speeds
ACTIVE STANDBY SLEEP STOP1 STOP2
NAME
ON
ON
ON
ON
ON
OFF
ON
ON
ON
ON
Preliminary data sheet
OFF
OFF
ON
ON
ON
System-on-Chip
FREQUENCY
304.819 MHz
50.803 MHz
76.205 MHz
50.803 MHz
50.803 MHz
50.803 MHz
50.803 MHz
50.803 MHz
32.768 kHz
20.0 MHz
48.0 MHz
20.0 MHz
OFF
OFF
OFF
ON
ON
(MAX.)
1.0 Hz
OFF
OFF
OFF
OFF
ON