ELLXT971ABE.A4 Intel, ELLXT971ABE.A4 Datasheet - Page 35

• Manufacturer Part Number: ELLXT971ABE.A4
• Description: IC TRANS 3.3V ETHERNET 64-BGA
• Manufacturer: Intel
• Type: PHY Transceiverr

Specifications of ELLXT971ABE.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 870479

5.4.1
5.4.2
5.4.2.1
5.4.2.2
Datasheet
Document Number: 249414-003
Revision Date: June 18, 2004
MDIO Control Mode and Hardware Control Mode
In the MDIO Control mode, the LXT971A Transceiver reads the Hardware Control Interface pins
to set the initial (default) values of the MDIO registers. Once the initial values are set, bit control
reverts to the MDIO interface.
The following modes are available using either Hardware Control or MDIO control:
In the Hardware Control Mode, the LXT971A Transceiver disables direct-write operations to the
MDIO registers through the MDIO Interface. On power-up or hardware reset, the LXT971A
Transceiver reads the Hardware Control Interface pins and sets the MDIO registers accordingly.
When the network link is forced to a specific configuration, the LXT971A Transceiver
immediately begins operating the network interface as commanded. When auto-negotiation is
enabled, the LXT971A Transceiver begins the auto-negotiation/parallel-detection operation.
Reduced-Power Modes
This section discusses the LXT971A Transceiver reduced-power modes.
Hardware Power Down
The hardware power-down mode is controlled by the PWRDWN pin. When PWRDWN is High,
the following conditions are true:
Software Power Down
Software power-down control is provided by Register bit 0.11 in the Control Register. (See
Table 45 on page 88.)
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•
•
•
•
•
•
•
•
Force network link to 100BASE-FX (Fiber)
Force network link operation to:
Allow auto-negotiation/parallel-detection
The LXT971A Transceiver network port and clock are shut down.
All outputs are tristated.
All weak pad pull-up and pull-down resistors are disabled.
The MDIO registers are not accessible.
The network port is shut down.
The MDIO registers remain accessible.
— 100BASE-TX, Full-Duplex
— 100BASE-TX, Half-Duplex
— 10BASE-T, Full-Duplex
— 10BASE-T, Half-Duplex
During soft power-down, the following conditions are true:
Intel
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
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