MC145574AAC Freescale Semiconductor, MC145574AAC Datasheet - Page 82

• Manufacturer Part Number: MC145574AAC
• Description: IC TRANSCEIVER ISDN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145574AAC

• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Compliant

9–6
9.9
B2 timeslot is ignored. IDL2 Tx ignores the demodulated B2 data, presenting in its stead the “idle
1s” condition in the IDL2 Rx B2 timeslot (hence, the term “non–transparent”). This bit is reset to 0
by either a software reset, a hardware reset, or in the “return to normal” mode (NR0(0) = 1).
BR6(3) — IDL2 B1 Loopback Transparent
This bit is a read/write bit and is applicable to both NT and TE modes of operation when the MC145574
is configured for GCI or IDL2 type interfaces. When this bit is a 0, the MC145574 operates normally.
When this bit is a 1, the MC145574 internally loops back the data received during the B1 timeslot
at D in and transmits it onto the D out pin during the B1 timeslot. Data entering the D in pin during the
B1 timeslot is also transmitted onto the S/T–interface. This bit is reset to 0 by either a software reset,
a hardware reset, or in the “return to normal” mode (NR0(0) = 1).
BR6(2) — IDL2 B1 Loopback Non–Transparent
This bit is a read/write bit and is applicable to both NT and TE modes of operation when the MC145574
is configured for GCI or IDL2 type interfaces. When this bit is a 0, the MC145574 operates normally.
When this bit is a 1, the MC145574 internally loops back the data received during the B1 channel
timeslot at D in and transmits it onto the D out pin during the B1 timeslot. Data entering the D in pin during
the B1 timeslot is not transmitted onto the S/T–interface. Instead, the MC145574 transmits idle 1s
onto the B1 channel bits of the S/T–interface. This bit is reset to 0 by either a software reset, a hardware
reset, or in the “return to normal” mode (NR0(0) = 1).
BR6(1) — IDL2 B2 Loopback Transparent
This bit is a read/write bit and is applicable to both NT and TE modes of operation when the MC145574
is configured for GCI or IDL2 type interfaces. When this bit is a 0, the MC145574 operates normally.
When this bit is a 1, the MC145574 internally loops back the data received during the B2 channel
timeslot at D in and transmits it onto the D out pin during the B2 timeslot. Data entering the D in pin during
the B2 timeslot is also transmitted onto the S/T–interface. This bit is reset to 0 by either a software
reset, a hardware reset, or in the “return to normal” mode (NR0(0) = 1).
BR6(0) — IDL2 B2 Loopback Non–Transparent
This bit is a read/write bit and is applicable to both NT and TE modes of operation when the MC145574
is configured for GCI or IDL2 type interfaces. When this bit is a 0, the MC145574 operates normally.
When this bit is a 1, the MC145574 internally loops back the data received during the B2 channel
timeslot at D in and transmits it onto the D out pin during the B2 timeslot. Data entering the D in pin during
the B2 timeslot is not transmitted onto the S/T–interface. Instead, the MC145574 transmits idle 1s
onto the B2 channel bits of the S/T–interface. This bit is reset to 0 by either a software reset, a hardware
reset, or in the “return to normal” mode (NR0(0) = 1).
BR7
BR7(7) — Activation Procedures Disabled
This bit a read/write bit and is applicable to both NT and TE modes of operation. When this bit is
0, the MC145574 functions normally. When this bit is set to 1, the transmit section of the transceiver
is forced into the highest information state. Thus, if the device is operating as NT, INFO 4 is forced
out on the transmit side of the device. INFO 4 is forced out regardless of what is being received on
RxP/RxN. If the device is operating as a TE, the transceiver transmits INFO 3 on TxP/TxN.
BR7
Procedures
Activation
Disabled
(7)
Freescale Semiconductor, Inc.
For More Information On This Product,
Procedures
NT: Active
Only NT
Channel
Ignored
Enable
TE: D
(6)
Go to: www.freescale.com
NT: Enable
Applicable
framing
TE: Not
MC145574
Multi–
(5)
NT: Invert E
TE: Map E
Channel
To IDL2
(4)
Free Run
NT: IDL2
TE: IDL2
Master
Mode
(3)
IDL2 Clock
Speed
(LSB)
(2)
Polarity
Control
LAPD
(1)
MOTOROLA
Applicable
Activation
Timer #2
Expired
TE: Not
NT:
(0)