Core1553BBC-SKT MICROSEMI, Core1553BBC-SKT Datasheet - Page 13

• Manufacturer Part Number: Core1553BBC-SKT
• Description: Programmable Logic Development Tools Bus Controller
• Manufacturer: MICROSEMI

Bus Controller Operation
After power-up, the bus controller waits while the CPU
sets up the bus controller memory and registers. The
memory contains an instruction list, message blocks, and
data blocks. Once the instruction list, message blocks,
and data blocks are setup, the CPU starts the bus
controller. The bus controller works its way through all
the message blocks until it reaches the end of the
instruction list
Figure 6 • BC Memory Usage
Instruction List
The instruction list contains pairs of words: an instruction
and a parameter. Core1553BBC supports a broad set of
instructions allowing branching and sub-routine calls
with condition code support. This allows complex
instruction lists to be supported. The instruction contains
a 4-bit OPCODE and a 5-bit condition code field
and
Table 14 • Supported Instructions
OPCODE Function Condition Code Parameter
0000
0001
0010
0011
0100
0101
Table
14).
DOMSG
DELAY
JUMP
HALT
NOP
INTR
(Figure
6).
N/A
Yes
Yes
Yes
Yes
Yes
INSTRUCTION
INSTRUCTION
INSTRUCTION
PARAMETER
PARAMETER
PARAMETER
Instruction
List
N/A
Message Block Address
New Instruction Address
User interrupt value
(Lower eight bits)
User interrupt value
(Lower eight bits)
Timer value
(Lower eight bits)
(Table 13
CW (RTRT RX)
CW (RTRT TX)
SW (RTRT TX)
SW (RTRT RX)
v4.0
MSGCMD
DATAPTR
Message
Block
TSW
The instruction list contains a list of pointers to message
blocks. The message block contains the command words
transmitted on the 1553B bus and status words received
from the 1553B bus. It also contains a pointer to a data
block. The data block contains the data transmitted on
the 1553B bus, or the data received from the 1553B bus.
Table 13 • Instruction Word
All of the OPCODES support the condition code field. If
the condition is TRUE, then the OPCODE is carried out;
otherwise, the BC continues to the next instruction. For
RT-to-RT messages, the condition code will be true if the
bit is set in either status word or not set in either status
word
15:13
Reserved
Description
No operation, jumps to next message
Jumps to the new message list address
Force a BC interrupt
Stop the BC
Loads the timer with the parameter and waits until the timer
reaches zero
Process the message block
(Table 15 on page
Core1553BBC MIL-STD-1553B Bus Controller
CONDCODE
Data Words
12:8
Block
Data
32
14).
Reserved
7:4
OPCODE
3:0
13