Core1553BBC-SKT MICROSEMI, Core1553BBC-SKT Datasheet - Page 11

• Manufacturer Part Number: Core1553BBC-SKT
• Description: Programmable Logic Development Tools Bus Controller
• Manufacturer: MICROSEMI

Table 9 • Setup Register (Continued)
Table 10 • Control Register
Table 11 • Status Register
Bits
3:2
1:0
Bits
3
2
1
0
Bits
15:8
7:6
5
4
3
2
1
0
FRAMEOK
BUSINUSE
LOOPFAIL
VERSION
Reserved
ASYNC
ASYNC
ACTIVE
Name
ABORT
Name
START
FLAG
STOP
RESPTIME
Reserved
Name
Type
Type
W
W
W
W
R
R
R
R
R
R
R
R
Type
RW
R
Writing a '1' stops the bus controller at the end of the current message.
Reserved, set to 00
Indicates which bus is in use
Function
Writing a '1' causes the bus controller to jump to process the asynchronous instruction list pointed to
by the ASYNCPTR register at the end of the current message. When a RETAS instruction is found, the
bus controller returns to the original instruction list. An ASYNC instruction can be issued while the
bus controller is both active and inactive.
Writing a '1' stops the bus controller immediately; both normal and asynchronous message operation
will be aborted.
Writing a '1' starts the bus controller. The bus controller cannot be started when an asynchronous
message is active.
Function
Indicates the Core1553BBC code revision
Core release notes provide latest version numbers.
Indicates that a loopback failure occurred in the current frame
Indicates that all the messages in the current frame have completed successfully and no system
action is required
Indicates the value of the flag condition stored by the STOREFLAG instruction
Asynchronous message requested or in progress. This bit is cleared by the RETAS instruction. When it
is active, the bus controller cannot be started.
0: Bus A
1: Bus B
BC is Active
Reset
01
00
Function
Sets the maximum time that the BC will wait for an RT to respond
00: 12µs
01: 16µs
10: 20µs
11: 24µs
Reserved, return 00
v4.0
Core1553BBC MIL-STD-1553B Bus Controller
11