MT46H8M16LFBF-6:K Micron Technology Inc, MT46H8M16LFBF-6:K Datasheet - Page 67

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MT46H8M16LFBF-6:K

Manufacturer Part Number
MT46H8M16LFBF-6:K
Description
IC SDRAM 128MB 166MHZ 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Series
-r
Datasheet

Specifications of MT46H8M16LFBF-6:K

Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
80mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
60-VFBGA
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H8M16LFBF-6:K
Manufacturer:
Micron Technology Inc
Quantity:
10 000
DQ (First data no longer valid)
Figure 30: Data Output Timing –
PDF: 09005aef8331b3e9
128mb_mobile_ddr_sdram_t35m.pdf - Rev. F 03/10 EN
DQ (First data no longer valid)
DQ and DQS, collectively
DQS0/DQS1/DQS2/DQS3
DQ (Last data valid)
DQ (Last data valid)
Notes:
CK#
DQ
DQ
DQ
DQ
DQ
DQ
CK
6,7
4
4
4
4
4
4
4
4
T1
1.
2. DQ transitioning after DQS transitions define the
3.
4. Byte 0 is DQ[7:0], byte 1 is DQ[15:8], byte 2 is DQ[23:16], byte 3 is DQ[31:24].
5.
6. The data valid window is derived for each DQS transition and is
7. DQ[7:0] and DQS0 for byte 0; DQ[15:8] and DQS1 for byte 1; DQ[23:16] and DQS2 for
t
t
DQS transition and ends with the last valid DQ transition.
t
byte 2; DQ[31:23] and DQS3 for byte 3.
t
HP
HP is the lesser of
DQSQ is derived at each DQS clock edge and is not cumulative over time; it begins with
QH is derived from
1
t
DQSQ,
t
HP
t
DQSQ
1
t
QH
t
QH, and Data Valid Window (x32)
T2
Data valid
5
2,3
window
t
CL or
t
T2
T2
T2
HP:
t
HP
1
t
t
t
QH =
DQSQ
CH clock transition collectively when a bank is active.
67
T2n
t
QH
Data valid
5
window
2,3
t
128Mb: x16, x32 Mobile LPDDR SDRAM
t
HP -
T2n
T2n
T2n
HP
1
t
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T3
QHS.
t
DQSQ
t
QH
t
5
2,3
Data valid
HP
window
1
T3
T3
T3
T3n
t
DQSQ window.
t
DQSQ
t
t
HP
QH
1
5
Data valid
2,3
window
T4
T3n
T3n
T3n
© 2007 Micron Technology, Inc. All rights reserved.
t
READ Operation
QH -
t
DQSQ.

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