STM32W108HBU61TR STMicroelectronics, STM32W108HBU61TR Datasheet - Page 137

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STM32W108HBU61TR

Manufacturer Part Number
STM32W108HBU61TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32W108HBU61TR

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
IEEE 802.15.4 Wireless
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.18V
Operating Supply Voltage (typ)
1.25V
Operating Supply Voltage (max)
1.32V
Package Type
VFQFPN EP
Pin Count
40
Mounting
Surface Mount
Rad Hardened
No
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
18
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Compliant

Available stocks

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Quantity
Price
Part Number:
STM32W108HBU61TR
Manufacturer:
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STM32W108CB, STM32W108HB
Note:
10.1.15
When a rising edge occurs on TI1 (Timer 1), both counters start counting synchronously on
the internal clock and both timers' INT_TIMTIF flags are set.
In this example both timers are initialized before starting by setting their respective TIM_UG
bits. Both counters starts from 0, but an offset can be inserted between them by writing any
of the counter registers (TIMx_CNT). The master/slave mode inserts a delay between
CNT_EN and CK_PSC on Timer 1.
Figure 49. Triggering Timers 1 and 2 with Timer 1 TI1 input
Timer signal descriptions
Table 26.
CK_PSC
Configure the Timer 1 in master/slave mode by writing TIM_MSM = 1 (TIM1_SMCR
register).
Configure Timer 2 to get the input trigger from Timer 1 (TIM_TS = 000 in the
TIM2_SMCR register).
Configure Timer 2 in trigger mode (TIM_SMS = 110 in the TIM2_SMCR register).
CK_INT
Signal
ETRF
ETRP
ETR
ICy
Timer signal descriptions
Internal/external
External
Internal
Internal
Internal
Internal
Internal
Doc ID 16252 Rev 8
Internal clock source: connects to STM32W108 peripheral
clock (PCLK) in internal clock mode.
Input to the clock prescaler.
External trigger input (used in external timer mode 2): a clock
selected by TIM_EXTRIGSEL in TIMx_OR.
External trigger: ETRP after filtering.
External trigger: ETR after polarity selection, edge detection
and prescaling.
Input capture or clock: TIy after filtering and edge detection.
Description
General-purpose timers
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