STM32F101RDT6TR STMicroelectronics, STM32F101RDT6TR Datasheet - Page 72

• Manufacturer Part Number: STM32F101RDT6TR
• Description: 16/32-BITS MICROS
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F101RDT6TR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 36MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 51
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical characteristics
Table 39.
1. C
2. Based on characterization, not tested in production.
72/106
t
t
t
t
t
t
t
t
t
t
t
t
t
t
d(D-NWE)
w(NIOWR)
v(NIOWR-D)
h(NIOWR-D)
d(NCE4_1-NIOWR)
h(NCEx-NIOWR)
h(NCE4_1-NIOWR)
d(NIORD-NCEx)
d(NIORD-NCE4_1)
h(NCEx-NIORD)
h(NCE4_1-NIORD)
su(D-NIORD)
d(NIORD-D)
w(NIORD)
Symbol
L
= 15 pF.
Switching characteristics for PC Card/CF read and write cycles
NAND controller waveforms and timings
Figure 35
corresponding timings. The results shown in this table are obtained with the following FSMC
configuration:
●
●
●
●
●
●
●
●
●
●
●
●
●
●
FSMC_D[15:0] valid before FSMC_NWE high
FSMC_NIOWR low width
FSMC_NIOWR low to FSMC_D[15:0] valid
FSMC_NIOWR high to FSMC_D[15:0] invalid
FSMC_NCE4_1 low to FSMC_NIOWR valid
FSMC_NCEx high to FSMC_NIOWR invalid
FSMC_NCE4_1 high to FSMC_NIOWR invalid
FSMC_NCEx low to FSMC_NIORD valid
FSMC_NCE4_1 low to FSMC_NIORD valid
FSMC_NCEx high to FSMC_NIORD invalid
FSMC_NCE4_1 high to FSMC_NIORD invalid
FSMC_D[15:0] valid before FSMC_NIORD high
FSMC_D[15:0] valid after FSMC_NIORD high
FSMC_NIORD low width
COM.FSMC_SetupTime = 0x01;
COM.FSMC_WaitSetupTime = 0x03;
COM.FSMC_HoldSetupTime = 0x02;
COM.FSMC_HiZSetupTime = 0x01;
ATT.FSMC_SetupTime = 0x01;
ATT.FSMC_WaitSetupTime = 0x03;
ATT.FSMC_HoldSetupTime = 0x02;
ATT.FSMC_HiZSetupTime = 0x01;
Bank = FSMC_Bank_NAND;
MemoryDataWidth = FSMC_MemoryDataWidth_16b;
ECC = FSMC_ECC_Enable;
ECCPageSize = FSMC_ECCPageSize_512Bytes;
TCLRSetupTime = 0;
TARSetupTime = 0;
through
Figure 38
Parameter
represent synchronous waveforms and
Doc ID 14610 Rev 7
STM32F101xC, STM32F101xD, STM32F101xE
13T
8T
11T
5T
5T
4.5
9
8T
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
Min
+ 3
– 5
– 5
+ 2
(1)(2)
Table 40
5T
5T
5T
(continued)
HCLK
HCLK
HCLK
Max
provides the
+3ns
+1
+ 2.5 ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns