ispPAC-POWR6AT6-01SN32I Lattice, ispPAC-POWR6AT6-01SN32I Datasheet - Page 20

• Manufacturer Part Number: ispPAC-POWR6AT6-01SN32I
• Description: Supervisory Circuits Prec Prog Pwr Supply Seq Mon Trim IND
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of ispPAC-POWR6AT6-01SN32I

• Number Of Voltages Monitored: 6
• Monitored Voltage: Adjustable
• Undervoltage Threshold: Adjustable
• Overvoltage Threshold: Adjustable
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 10000 uA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFNS-32
• Minimum Operating Temperature: - 40 C
• Applications: Power Supply Controller/Monitor
• Voltage - Input: -0.3 V ~ 5.9 V
• Voltage - Supply: 2.8 V ~ 3.96 V
• Current - Supply: 10mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
the SMBus Alert cycle. Refer to the CLTLOCK/SMBA pin and SMBus Alert sections of this datasheet for more
information on how the closed-loop trim status in this I
Figure 3-15. I
It is possible to read the value of the voltage present on any of the VMON inputs by using the ispPAC-POWR6AT6’s
ADC. Three registers provide the I
Figure 3-16. ADC Interface Registers
To perform an A/D conversion, one must set the input attenuator and channel selector. Two input ranges may be
set using the attenuator, 0 - 2.048V and 0 - 6.144V. Table 3-5 shows the input attenuator settings.
Table 3-5. ADC Input Attenuator Control
The input selector may be set to monitor any one of the six VMON inputs or the VCCA input. Table 3-6 shows the
codes associated with each input selection.
Table 3-6. V
MON
2
C Closed Loop Trim Status Register
Address Selection Table
0x00 – CLTLOCK_STATUS (b6 = Read/Write; all others Read Only)
0x01 - ADC_VALUE_LOW (Read Only)
0x02 - ADC_VALUE_HIGH (Read Only)
0x03 - ADC_MUX (Read/Write)
D11
D3
ATTEN (ADC_MUX.4)
b7
b7
b7
b7
X
X
(ADC_MUX.2)
SEL2
SMBA
D10
D2
0
1
0
0
0
0
1
1
b6
b6
b6
b6
X
2
C interface to the ADC (Figure 3-16).
in6
D1
D9
b5
b5
b5
b5
X
(ADC_MUX.1)
Select Word
SEL1
0
0
1
1
0
0
ATTEN
in5
D0
D8
b4
b4
b4
b4
Resolution
2
C register is used.
3-20
2mV
6mV
(ADC_MUX.0)
in4
D7
b3
b3
b3
b3
X
1
SEL0
0
1
0
1
0
1
SEL2
in3
D6
b2
b2
b2
b2
1
Full-Scale Range
ispPAC-POWR6AT6 Data Sheet
Input Channel
VMON1
VMON2
VMON3
VMON4
VMON5
VMON6
2.048 V
6.144 V
SEL1
in2
D5
b1
b1
b1
b1
1
DONE
SEL0
in1
D4
b0
b0
b0
b0