ICS1893CY-10LF IDT, Integrated Device Technology Inc, ICS1893CY-10LF Datasheet - Page 39

• Manufacturer Part Number: ICS1893CY-10LF
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893CY-10LF

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 1893CY-10LF; 800-1025

6.2.2 Auto-Negotiation: Parallel Detection
ICS1893CY-10 Rev 1/07
6. To indicate that the auto-negotiation process is complete, the ICS1893CY-10 sets bits 1.5 and 17.4
The ICS1893CY-10 supports parallel detection. It is therefore compatible with networks that do not support
the auto-negotiation process. When enabled, the Auto-Negotiation sublayer can detect legacy 10Base-T
link partners as well as 100Base-TX link partners that do not have an auto-negotiation capability.
The Auto-Negotiation sublayer performs this parallel detection function when it does not get a response to
its FLP bursts. In these situations, the Auto-Negotiation sublayer performs the following steps:
1. It sets the LP_AutoNeg_Able bit (bit 6.0) to logic zero, thereby identifying the remote link partner as not
2. It sets the bit in the Auto-Negotiation Link Partner Abilities Register that corresponds to the 'parallel
3. It sets the Status Register’s Auto-Negotiation Complete bit (bit 1.5) to logic one, indicating completion
4. It enables the detected link technology and disables the unused technologies.
A remote link partner that does not support the auto-negotiation process does not respond to the
transmitted FLP bursts. The ICS1893CY-10 detects this situation and responds according to the data it
receives. The ICS1893CY-10 can receive one of five potential responses to the FLP bursts it is transmitting:
FLP bursts, 10Base-T link pulses (that is, Normal Link Pulses), scrambled 100Base IDLEs, nothing, or a
combination of signal types.
A 10Base-T link partner transmits only Normal Link Pulses when idle. When the ICS1893CY-10 receives
Normal Link Pulses, it concludes that the remote link partner is a device that can use only 10Base-T
technology. A 100Base-TX node without an Auto-Negotiation sublayer transmits 100M scrambled IDLE
symbols in response to the FLP bursts. Upon receipt of the scrambled IDLEs, the ICS1893CY-10
concludes that its remote link partner is a 100Base-TX node that does not support the auto-negotiation
process. For both 10Base-T and 100Base-TX nodes without an Auto-Negotiation sublayer, the
ICS1893CY-10 clears bit 6.0 to logic zero, indicating that the link partner cannot perform the
auto-negotiation process.
ICS1893CY-10 - Release
Table 6-1
place.
Table 6-1. Example of Selection Process of Highest-Priority Technology
high to logic one. After successful completion of the auto-negotiation process, the ICS1893CY-10
Auto-Negotiation sublayer performs the following steps:
a. It sets to logic one the Status Register’s Auto-Negotiation Complete bit (bit 1.5, which is also
b. It enables the negotiated link technology (such as the 100Base Transmit modules and 100Base
c. It disables the unused technologies to reduce the overall power consumption.
being capable of executing the auto-negotiation process.
detected' technology [for example, half-duplex, 10Base-T (bit 5.5) or half-duplex, 100Base-TX (bit
5.7)].
of the auto-negotiation process.
If Register 4 Has These
Technologies:
(3) 100Base-TX half duplex
(4) 100Base-T full duplex
available in the QuickPoll register as bit 17.4).
Receive modules).
shows an example of how the selection process of the highest-priority technology takes
Copyright © 2007, Integrated Device Technology, Inc.
If Register 5 Has These
Technologies:
(1) 100Base-TX full duplex
(3) 100Base-TX half duplex
All rights reserved.
39
Resulting Highest-Priority Common
Technology from Auto-Negotiation
Sublayer
(3) 100Base-TX half duplex
Chapter 6 Functional Blocks