ICS1893CF IDT, Integrated Device Technology Inc, ICS1893CF Datasheet - Page 79

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ICS1893CF

Manufacturer Part Number
ICS1893CF
Description
PHYCEIVER LOW PWR 3.3V 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet

Specifications of ICS1893CF

Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Other names
1893CF

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7.13.8 Link Loss Inhibit (bit 18.1)
7.13.9 Squelch Inhibit (bit 18.0)
ICS1893CF, Rev. K, 05/13/10
The Link Loss Inhibit bit allows an STA to prevent the ICS1893CF from dropping the link in 10Base-T
mode. When an STA sets this bit to logic:
The Squelch Inhibit bit allows an STA to control the ICS1893CF Squelch Detection in 10Base-T mode.
When an STA sets this bit to logic:
Zero, the state machine behaves normally and the link status is based on the signaling detected Twisted-
Pair Receiver inputs.
One, the ICS1893CF 10Base-T Link Integrity Test state machine is forced into the ‘Link Passed’ state
regardless of the Twisted-Pair Receiver input conditions.
Zero, before the ICS1893CF can establish a valid link, the ICS1893CF must receive valid 10Base-T
data.
One, before the ICS1893CF can establish a valid link, the ICS1893CF must receive both valid 10Base-T
data followed by an IDL.
ICS1893CF Data Sheet Rev. J - Release
Copyright © 2009, Integrated Device Technology, Inc.
All rights reserved.
79
Chapter 7 Management Register Set
May, 2010

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