PIC18F46K80-I/ML Microchip Technology Inc., PIC18F46K80-I/ML Datasheet - Page 573

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PIC18F46K80-I/ML

Manufacturer Part Number
PIC18F46K80-I/ML
Description
44 QFN 8X8X0.9MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F46K80-I/ML

A/d Inputs
11-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
TABLE 31-10: CLKO AND I/O TIMING REQUIREMENTS
FIGURE 31-6:
 2011 Microchip Technology Inc.
Param.
150
151
155
160
161
162
163
164
165
166
167
168
169
171
171A
No
Note:
Watchdog
Oscillator
Time-out
Time-out
I/O pins
Internal
Internal
PWRT
MCLR
Reset
Reset
Timer
POR
TadV2alL
TalL2adl
TalL2oeL
TadZ2oeL
ToeH2adD OE  to AD Driven
TadV2oeH LS Data Valid before OE  (data setup time)
ToeH2adl
TalH2alL
ToeL2oeH OE Pulse Width
TalH2alH
Tacc
Toe
TalL2oeH
TalH2csL
TubL2oeH AD Valid to Chip Enable Active
V
Symbol
DD
Refer to
Figure 31-3
Address Out Valid to ALE 
(address setup time)
ALE  to Address Out Invalid
(address hold time)
ALE  to OE 
AD High-Z to OE  (bus release to OE)
OE  to Data In Invalid (data hold time)
ALE Pulse Width
ALE  to ALE  (cycle time)
Address Valid to Data Valid
OE  to Data Valid
ALE  to OE 
Chip Enable Active to ALE 
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
33
for load conditions.
Characteristics
32
Preliminary
PIC18F66K80 FAMILY
34
0.625 T
0.25 T
0.125 T
0.75 T
0.25 T
30
0.5 T
Min
10
20
CY
5
0
0
CY
CY
CY
CY
CY
– 10
– 5
– 25
– 20
– 10
– 5
0.125 T
0.25 T
0.5 T
31
Typ
T
CY
CY
CY
CY
0.625 T
0.5 T
DS39977C-page 573
34
Max
CY
10
CY
– 25
+ 10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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