PIC18F46K80-I/ML Microchip Technology Inc., PIC18F46K80-I/ML Datasheet - Page 468

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PIC18F46K80-I/ML

Manufacturer Part Number
PIC18F46K80-I/ML
Description
44 QFN 8X8X0.9MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F46K80-I/ML

A/d Inputs
11-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC18F66K80 FAMILY
REGISTER 28-6:
DS39977C-page 468
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3-1
bit 0
DEBUG
R/P-1
DEBUG: Background Debugger Enable bit
1 = Background debugger is disabled, RB6 and RB7 are configured as general purpose I/O pins
0 = Background debugger is enabled, RB6 and RB7 are dedicated to In-Circuit Debug
Unimplemented: Read as ‘ 0 ’
BBSIZ0: Boot Block Size Select bit
1 = 2 kW boot block size
0 = 1 kW boot block size
Unimplemented: Read as ‘ 0 ’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause a Reset
0 = Stack full/underflow will not cause a Reset
U-0
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
U-0
BBSIZ0
R/P-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
 2011 Microchip Technology Inc.
x = Bit is unknown
U-0
STVREN
R/P-1
bit 0

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