PIC16F631-I/P Microchip Technology Inc., PIC16F631-I/P Datasheet - Page 46
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F631-I/P
Manufacturer Part Number
PIC16F631-I/P
Description
MCU, 8-Bit, 1KW Flash, 64 RAM, 18 I/O, PDIP-20
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F631-IP.pdf
(294 pages)
Specifications of PIC16F631-I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
18
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
64 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F631-I/P
Manufacturer:
MICROCHIP
Quantity:
4 500
Part Number:
PIC16F631-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 46 of 294
- Download datasheet (6Mb)
PIC16F631/677/685/687/689/690
2.3
The Program Counter (PC) is 13 bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The high byte (PC<12:8>) is not directly
readable or writable and comes from PCLATH. On any
Reset, the PC is cleared. Figure 2-9 shows the two
situations for the loading of the PC. The upper example
in Figure 2-9 shows how the PC is loaded on a write to
PCL (PCLATH<4:0> → PCH). The lower example in
Figure 2-9 shows how the PC is loaded during a CALL or
GOTO instruction (PCLATH<4:3> → PCH).
FIGURE 2-9:
2.3.1
Executing any instruction with the PCL register as the
destination
Counter PC<12:8> bits (PCH) to be replaced by the
contents of the PCLATH register. This allows the entire
contents of the program counter to be changed by
writing the desired upper 5 bits to the PCLATH register.
When the lower 8 bits are written to the PCL register, all
13 bits of the program counter will change to the values
contained in the PCLATH register and those being
written to the PCL register.
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). Care should be
exercised when jumping into a look-up table or
program branch table (computed GOTO) by modifying
the PCL register. Assuming that PCLATH is set to the
table start address, if the table length is greater than
255 instructions or if the lower 8 bits of the memory
address rolls over from 0xFF to 0x00 in the middle of
the table, then PCLATH must be incremented for each
address rollover that occurs between the table
beginning and the target location within the table.
For more information refer to Application Note AN556,
“Implementing a Table Read” (DS00556).
DS41262D-page 44
PC
PC
12
12 11 10
2
PCL and PCLATH
5
PCH
PCLATH<4:3>
PCH
MODIFYING PCL
simultaneously causes the
PCLATH
PCLATH<4:0>
8
PCLATH
8
7
7
LOADING OF PC IN
DIFFERENT SITUATIONS
PCL
PCL
11
8
0
0
OPCODE<10:0>
ALU Result
GOTO, CALL
Instruction with
Destination
Program
PCL as
2.3.2
The PIC16F631/677/685/687/689/690 devices have an
8-level x 13-bit wide hardware stack (see Figures 2-2
and 2-3). The stack space is not part of either program
or data space and the Stack Pointer is not readable or
writable. The PC is PUSHed onto the stack when a
CALL instruction is executed or an interrupt causes a
branch. The stack is POPed in the event of a RETURN,
RETLW or a RETFIE instruction execution. PCLATH is
not affected by a PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
2.4
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF
register. Any instruction using the INDF register actually
accesses data pointed to by the File Select Register
(FSR). Reading INDF itself indirectly will produce 00h.
Writing to the INDF register indirectly results in a no
operation (although Status bits may be affected). An
effective 9-bit address is obtained by concatenating the
8-bit FSR and the IRP bit of the STATUS register, as
shown in Figure 2-10.
A simple program to clear RAM location 20h-2Fh using
indirect addressing is shown in Example 2-1.
EXAMPLE 2-1:
NEXT
CONTINUE
Note 1: There are no Status bits to indicate stack
2: There are no instructions/mnemonics
Indirect Addressing, INDF and
FSR Registers
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
STACK
overflow or stack underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW and RETFIE
instructions or the vectoring to an
interrupt address.
0x20
FSR
INDF
FSR
FSR,4
NEXT
INDIRECT ADDRESSING
© 2007 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
Related parts for PIC16F631-I/P
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![PIC16F1507-E/ML](/photos/16/3/160361/qfn20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507-E/P](/photos/16/12/161290/pdip20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 PDIP .300in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507-E/SO](/photos/16/12/161297/soic20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507-E/SS](/photos/16/12/161299/ssop20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507-I/ML](/photos/16/3/160361/qfn20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507-I/P](/photos/16/12/161290/pdip20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 PDIP .300in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507-I/SO](/photos/16/12/161297/soic20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507-I/SS](/photos/16/12/161299/ssop20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507T-I/ML](/photos/16/3/160361/qfn20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm T/R
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507T-I/SO](/photos/16/12/161297/soic20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in T/R
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1507T-I/SS](/photos/16/12/161299/ssop20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in T/R
Manufacturer:
Microchip Technology
Datasheet:
![PIC16LF1507-E/ML](/photos/16/3/160361/qfn20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16LF1507-E/P](/photos/16/12/161290/pdip20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 PDIP .300in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16LF1507-E/SO](/photos/16/12/161297/soic20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC16LF1507-E/SS](/photos/16/12/161299/ssop20_tmb.jpg)
Part Number:
Description:
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE
Manufacturer:
Microchip Technology
Datasheet: