FIN1018MX Fairchild Semiconductor, FIN1018MX Datasheet - Page 4

• Manufacturer Part Number: FIN1018MX
• Description: RECEIVER 3.3V LVDS HS 8SOIC
• Manufacturer: Fairchild Semiconductor
• Type: Receiverr

Specifications of FIN1018MX

• Number Of Drivers/receivers: 0/1
• Protocol: LVDS
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Logic Family: FIN10
• Logic Type: High Speed Differential Receiver
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Data Rate: 400 Mbps
• Interface: EIA/TIA-644
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 1 / 1
• Supply Current: 7 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Stress
PCNL1A
Environment Stress Detail:
Stress
HAST2
HTSL
TMCL1
Device #3 FDFS6N754
Package:
#Leads:
Precondition Description:
Stress
PCNL1A
Environment Stress Detail:
Stress
HAST2
HTGB
HTRB
HTSL
PRCL
TMCL1
Device #4 FDS4465
Package:
#Leads:
Precondition Description:
Stress
PCNL1A
Environment Stress Detail:
Stress
HAST2
HTGB
HTRB
PRCL
TMCL1
Device #5 FDS6299S
Package:
#Leads:
P/C
X
X
X
P/C
X
X
X
P/C
X
X
-1
P/C
P/C
P/C
Standard
JESD22-A110 85%RH, 110C,
JESD22-A103 150C
JESD22-A104 -65C, 150C
Standard
JESD22-A110 85%RH, 110C,
JESD22-A108 150C, 0V
JESD22-A108 150C, 0V
JESD22-A103 150C
MIL-
STD-750-1036
JESD22-A104 -65C, 150C
Standard
JESD22-A110 85%RH, 110C,
JESD22-A108 150C, 0V
JESD22-A108 150C, 0V
MIL-
STD-750-1036
JESD22-A104 -65C, 150C
Standard
JESD22-A113
Standard
JESD22-A113
Standard
JESD22-A113
Conditions
0V
Conditions
0V
Delta 100CC, 2
Min cycle
Conditions
0V
Delta 100CC, 2
Min cycle
Conditions
Conditions
Conditions
Readpoints
TP1
264
168
100
Readpoints
TP1
264
168
168
168
5000
100
Readpoints
TP1
264
168
168
5000
100
TP2
500
500
TP2
500
500
500
10000
500
TP2
500
500
10000
500
TP3
1000
TP3
1000
1000
1000
TP3
1000
1000
Read-
points
Read-
points
Read-
points
Samples
A
45
77
77
Samples
A
77
77
77
77
77
77
Samples
A
77
77
77
77
77
Sample
Sample
Sample
A
A
A
0
0
0
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